x86 mterp: reduce x86/x86-atom differences

x86 mterp: reduce x86/x86-atom differences

To ease future x86 development, elminate unnecessary differences
between x86 and x86-atom targets.

1.  Macros instead of defines (cosmetic change)
2.  Register naming convention (cosmetic change)
3.  Register usage convention
    - Drop rIBASE, freeing %edx for general usage
    - use %edi for rPC (callee-save) & eliminate spills
4.  Spill & temp frame layout
5.  rGLUE usage 0(%ebp) instead of -24(%ebp)
6.  Jump table transition between instruction interpretations
    instead of computed goto.
7.  Change entry convention for instruction handlers:
    Previously:
       %bl contains 8-bit Dalvik opcode
       %bh contains 2nd half of 16-bit Dalvik insn (usually AA or BA)
       upper 16 bits of %ebx are zero
    Now:
       %bl contains 2nd half of 16-bit Dalvik insn (usually AA or BA)
       upper 24 bits of %ebx are zero
8.  Include copies of x86-atom macros and defines into x86 build.  This
    allows the x86 build to mix-and-match x86 and x86-atom handlers
    via the normal config mechanism.  [Note - only for non-control-flow
    instructions.  There are still some conflicts in the footer.S
    main loop re-entry points].

Change-Id: Ib9d549b56f7ffd7420f9dbf97b2169f65603ee83