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spi: dw: Add support for Intel Keem Bay SPI
authorWan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Tue, 5 May 2020 13:06:16 +0000 (21:06 +0800)
committerMark Brown <broonie@kernel.org>
Tue, 5 May 2020 14:08:00 +0000 (15:08 +0100)
commitf42377916ed534649341777669628f22ef1edf59
tree69851d1bb77f6dd1886eaccde48466578f0ca896
parente539f435cb9c78c6984b75f16b65a2ece7867981
spi: dw: Add support for Intel Keem Bay SPI

Add support for Intel Keem Bay SPI controller, which uses DesignWare
DWC_ssi core. Bit 31 of CTRLR0 register is added for Keem Bay, to
configure the device as a master or as a slave serial peripheral.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200505130618.554-6-wan.ahmad.zainie.wan.mohamad@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-dw-mmio.c