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[X86] Add test cases showing the disassembler producing an xmm16-xmm31 register in...
authorCraig Topper <craig.topper@intel.com>
Fri, 1 Jun 2018 00:10:32 +0000 (00:10 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 1 Jun 2018 00:10:32 +0000 (00:10 +0000)
commitf431a94a97d1494b7df52c57b9a11ea80b0b6514
treeee4d9e86644b131b815f619516eb8601d0ba6c41tree | snapshot
parent2522e34cd59bcc87e8626328f0a2f2c3199c8ad9commit | diff
[X86] Add test cases showing the disassembler producing an xmm16-xmm31 register in 32-bit mode.

We aren't properly suppressing the reading of VEX.R' and VEX.V' in 32-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333713 91177308-0d34-0410-b5e6-96231b3b80d8
test/MC/Disassembler/X86/x86-32.txt diff | blob | history
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