OSDN Git Service

(root) / android-x86 / external-llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: b0f6759) | patch
MFTB on PPC64 should really be encoded using MFSPR.
authorHal Finkel <hfinkel@anl.gov>
Mon, 6 Aug 2012 21:21:44 +0000 (21:21 +0000)
committerHal Finkel <hfinkel@anl.gov>
Mon, 6 Aug 2012 21:21:44 +0000 (21:21 +0000)
commitf45717e985260e9416dbd2fe8df471d48705c86a
tree923d6a32b94723bad2265bccd735fbea08895d62tree | snapshot
parentb0f6759ab93b42570d71665b13d24ca2c4a5f276commit | diff
MFTB on PPC64 should really be encoded using MFSPR.

The MFTB instruction itself is being phased out, and its functionality
is provided by MFSPR. According to the ISA docs, using MFSPR works on all known
chips except for the 601 (which did not have a timebase register anyway)
and the POWER3.

Thanks to Adhemerval Zanella for pointing this out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161346 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstr64Bit.td diff | blob | history
test/CodeGen/PowerPC/ppc64-cyclecounter.ll diff | blob | history
external/llvm
About OSDN
Find Software
Develop Software
Help