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drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs
authorImre Deak <imre.deak@intel.com>
Thu, 6 May 2021 16:19:29 +0000 (19:19 +0300)
committerImre Deak <imre.deak@intel.com>
Fri, 7 May 2021 08:13:02 +0000 (11:13 +0300)
commitf6b044e4d9fb3b2b00681c96a3fc438e9c281ef2
treec752a08b31407a6510775f737b0af7b1a229c51d
parentd3b4aa43eea3aebea51bfb02ca5ce93df0abc9c4
drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs

The specification only requires DPT FB strides to be POT aligned, but
there seems to be also a minimum of 8 stride tile requirement. Scanning
out FBs with < 8 stride tiles will result in pipe faults (even though
the stride is POT aligned).

Signed-off-by: Imre Deak <imre.deak@intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210506161930.309688-10-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_fb.c