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i965/clear: Don't perform redundant depth clears
authorJason Ekstrand <jason@jlekstrand.net>
Thu, 15 Jun 2017 01:54:29 +0000 (18:54 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Wed, 26 Jul 2017 21:43:01 +0000 (14:43 -0700)
commitf6e478c213c30203e9623d5657fd3789cf6368f3
tree78728ed75c939dc6f32d693bd7146e8f7958b9a4
parent6db193701e7d03e0eadd54fc3e1b3d75719bc4ae
i965/clear: Don't perform redundant depth clears

We already have this little optimization for color clears.  Now that
we're actually tracking whether or not a slice has any fast-clear
blocks, it's easy enough to add for depth clears too.

Improves performance of GFXBench 4 TRex at 1920x1080 by:
- Skylake GT4: 0.905932% +/- 0.0620197% (n = 30)
- Apollolake:  0.382434% +/- 0.1134730% (n = 25)

v2: (by Ken) Rebase and drop intel_mipmap_tree.c changes, as they're
    no longer necessary (other patches already landed to do that part)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_clear.c