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(merge: ac9a786 d1c2088)
Merge tag 'renesas-clk-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel...
authorStephen Boyd <sboyd@kernel.org>
Fri, 9 Jun 2023 00:40:12 +0000 (17:40 -0700)
committerStephen Boyd <sboyd@kernel.org>
Fri, 9 Jun 2023 00:40:12 +0000 (17:40 -0700)
commitf73b836edfef23054c227712bbdb9d4c23e00440
tree2695947f63ccc22f623fd8c13eaf4ec234f7b3a2tree | snapshot
parentac9a78681b921877518763ba0e89202254349d1bcommit | diff
parentd1c20885d3b01e6a62e920af4b227abd294d22f3commit | diff
Merge tag 'renesas-clk-for-v6.5-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Add PWM clock on Renesas R-Car V3U
 - Fix PLL5 on Renesas RZ/G2L and RZ/V2L

* tag 'renesas-clk-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write
  clk: renesas: r8a779a0: Add PWM clock
This is a test repository.
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