OSDN Git Service

platform/x86: intel_pmc_core: Change Jasper Lake S0ix debug reg map back to ICL
authorArchana Patni <archana.patni@intel.com>
Tue, 21 Apr 2020 08:40:19 +0000 (14:10 +0530)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Fri, 24 Apr 2020 09:45:18 +0000 (12:45 +0300)
commitf78bf066acb92c93325e820802f9eb866007c86c
tree392ac8507b9f8e5b2fb8e55c808097501139e5a8
parent295615f5e5a56558bb1502f4fefad5569ec1209c
platform/x86: intel_pmc_core: Change Jasper Lake S0ix debug reg map back to ICL

Jasper Lake uses Icelake PCH IPs and the S0ix debug interfaces are same as
Icelake. It uses SLP_S0_DBG register latch/read interface from Icelake
generation. It doesn't use Tiger Lake LPM debug registers. Change the
Jasper Lake S0ix debug interface to use the ICL reg map.

Fixes: 16292bed9c56 ("platform/x86: intel_pmc_core: Add Atom based Jasper Lake (JSL) platform support")
Signed-off-by: Archana Patni <archana.patni@intel.com>
Acked-by: David E. Box <david.e.box@intel.com>
Tested-by: Divagar Mohandass <divagar.mohandass@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
drivers/platform/x86/intel_pmc_core.c