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(parent: 516a49c) | patch
drm/i915/icl: compute the TBT PLL registers
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Wed, 11 Jul 2018 21:59:02 +0000 (14:59 -0700)
committerPaulo Zanoni <paulo.r.zanoni@intel.com>
Thu, 19 Jul 2018 22:29:12 +0000 (15:29 -0700)
commitf7a738fca03c8dae6a1b448393989cc9f612198d
tree08bf473d7b4bfa5e1082706c007dcc1434b5bb9ctree | snapshot
parent516a49cc19467e298d08a404f73a6e311f4548d1commit | diff
drm/i915/icl: compute the TBT PLL registers

Use the hardcoded tables provided by our spec.

v2:
  - SSC stays disabled.
  - Use intel_port_is_tc().

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180711215909.23945-2-paulo.r.zanoni@intel.com
drivers/gpu/drm/i915/intel_dpll_mgr.c diff | blob | history
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