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[X86] AMX programming model.
authorLuo, Yuanke <yuanke.luo@intel.com>
Sun, 6 Sep 2020 02:17:22 +0000 (10:17 +0800)
committerLuo, Yuanke <yuanke.luo@intel.com>
Thu, 10 Dec 2020 09:01:54 +0000 (17:01 +0800)
commitf80b29878b0448efb306b9c93c49e5deb9ba2738
tree0cc5cc9ff35b92a8c63a980de704cd071703fd45
parent09f717b929ae040ae1bf9e9ec56f6dd4a5dba2f8
[X86] AMX programming model.
 This patch implements amx programming model that discussed in llvm-dev
 (http://lists.llvm.org/pipermail/llvm-dev/2020-August/144302.html).
 Thank Hal for the good suggestion in the RA. The fast RA is not in the patch yet.
 This patch implemeted 7 components.

1. The c interface to end user.
2. The AMX intrinsics in LLVM IR.
3. Transform load/store <256 x i32> to AMX intrinsics or split the
   type into two <128 x i32>.
4. The Lowering from AMX intrinsics to AMX pseudo instruction.
5. Insert psuedo ldtilecfg and build the def-use between ldtilecfg to amx
   intruction.
6. The register allocation for tile register.
7. Morph AMX pseudo instruction to AMX real instruction.

Change-Id: I935e1080916ffcb72af54c2c83faa8b2e97d5cb0

Differential Revision: https://reviews.llvm.org/D87981
39 files changed:
clang/include/clang/Basic/BuiltinsX86_64.def
clang/lib/Headers/amxintrin.h
clang/test/CodeGen/X86/amx_api.c [new file with mode: 0644]
llvm/include/llvm/CodeGen/LiveIntervalUnion.h
llvm/include/llvm/CodeGen/LiveRegMatrix.h
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/CodeGen/TileShapeInfo.h [new file with mode: 0644]
llvm/include/llvm/CodeGen/VirtRegMap.h
llvm/include/llvm/IR/Intrinsics.td
llvm/include/llvm/IR/IntrinsicsX86.td
llvm/lib/CodeGen/InlineSpiller.cpp
llvm/lib/CodeGen/LiveIntervalUnion.cpp
llvm/lib/CodeGen/LiveRegMatrix.cpp
llvm/lib/CodeGen/VirtRegMap.cpp
llvm/lib/Target/X86/CMakeLists.txt
llvm/lib/Target/X86/X86.h
llvm/lib/Target/X86/X86ExpandPseudo.cpp
llvm/lib/Target/X86/X86FrameLowering.cpp
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86InstrAMX.td
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86LowerAMXType.cpp [new file with mode: 0644]
llvm/lib/Target/X86/X86PreTileConfig.cpp [new file with mode: 0644]
llvm/lib/Target/X86/X86RegisterInfo.cpp
llvm/lib/Target/X86/X86RegisterInfo.h
llvm/lib/Target/X86/X86RegisterInfo.td
llvm/lib/Target/X86/X86Subtarget.h
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/lib/Target/X86/X86TileConfig.cpp [new file with mode: 0644]
llvm/test/CodeGen/X86/AMX/amx-across-func.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/AMX/amx-config.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/AMX/amx-spill.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/AMX/amx-type.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/O0-pipeline.ll
llvm/test/CodeGen/X86/ipra-reg-usage.ll
llvm/test/CodeGen/X86/opt-pipeline.ll
llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir
llvm/test/CodeGen/X86/statepoint-fixup-shared-ehpad.mir