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(parent: 79c4c8e) | patch
drm/amdgpu/gfx: Improvement on EDC GPR workarounds
authorJames Zhu <James.Zhu@amd.com>
Tue, 3 Dec 2019 20:40:10 +0000 (15:40 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 5 Dec 2019 21:24:28 +0000 (16:24 -0500)
commitf83f5a1e115c8dc382a5abaaf0c10374fbcf1038
treec05c52a817318115f0c3a974f52e2203340a17adtree | snapshot
parent79c4c8ea913076338e70252f947a8805daa8f91bcommit | diff
drm/amdgpu/gfx: Improvement on EDC GPR workarounds

SPI limits total CS waves in flight per SE to no more than 32 * num_cu and
we need to stuff 40 waves on a CU to completely clean the SGPR. This is
accomplished in the WR by cleaning the SE in two steps, half of the CU per
step.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c diff | blob | history
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