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[GISel]: Add missing opcodes for overflow intrinsics
authorAditya Nandakumar <aditya_nandakumar@apple.com>
Tue, 28 Aug 2018 18:54:10 +0000 (18:54 +0000)
committerAditya Nandakumar <aditya_nandakumar@apple.com>
Tue, 28 Aug 2018 18:54:10 +0000 (18:54 +0000)
commitf8d714889d165d4271f64ac620fd1d1d94cbcfd6
treeabca64550cb0645c3c5857eaed5809cbd90d07ee
parent31d4eb8d76578be47cdd72b5944c5785c00f2a6d
[GISel]: Add missing opcodes for overflow intrinsics

https://reviews.llvm.org/D51197

Currently, IRTranslator (and GISel) seems to be arbitrarily picking
which overflow intrinsics get mapped into opcodes which either have a
carry as an input or not.
For intrinsics such as Intrinsic::uadd_with_overflow, translate it to an
opcode (G_UADDO) which doesn't have any carry inputs (similar to LLVM
IR).

This patch adds 4 missing opcodes for completeness - G_UADDO, G_USUBO,
G_SSUBE and G_SADDE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340865 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Support/TargetOpcodes.def
include/llvm/Target/GenericOpcodes.td
lib/CodeGen/GlobalISel/IRTranslator.cpp
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir