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drm/amdgpu: enable imu_rlc_ram programming for v11_0_3
authorHawking Zhang <Hawking.Zhang@amd.com>
Sat, 2 Jul 2022 02:20:03 +0000 (10:20 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 30 Aug 2022 20:37:14 +0000 (16:37 -0400)
commitf926464e59b7029b02d731a9f8a31419ff973ed3
tree32f2a4346020a2ec1f2ea4951545edb36595ea8f
parent5ddb5fe9e5a5c7f518a29df22c2f5af62cc74826
drm/amdgpu: enable imu_rlc_ram programming for v11_0_3

All gc v11_0_3 registers in gcvml2 range have different
register offset from the ones in gc v11_0_0. v11_0_3
imu_rlc_ram programming has to be separated from v11_0_0
implementation

v2: fix checkpatch errors (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/Makefile
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.c [new file with mode: 0644]
drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.h [new file with mode: 0644]