OSDN Git Service

[ARM GlobalISel] 64-bit memops should be aligned
authorDiana Picus <diana.picus@linaro.org>
Mon, 25 Mar 2019 08:54:29 +0000 (08:54 +0000)
committerDiana Picus <diana.picus@linaro.org>
Mon, 25 Mar 2019 08:54:29 +0000 (08:54 +0000)
commitfa60fe0a8f358563cbd4219811de57204036c7b7
tree734fec768e4b05259d235a00bbd233f1fc960597
parenta8f354662a73aeb5425ca6b5351cbe3c5dbfa390
[ARM GlobalISel] 64-bit memops should be aligned

We currently use only VLDR/VSTR for all 64-bit loads/stores, so the
memory operands must be word-aligned. Mark aligned operations as legal
and narrow non-aligned ones to 32 bits.

While we're here, also mark non-power-of-2 loads/stores as unsupported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356872 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMLegalizerInfo.cpp
test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
test/CodeGen/ARM/GlobalISel/arm-legalizer.mir