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drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge
authorSwapnil Jakhade <sjakhade@cadence.com>
Fri, 18 Sep 2020 12:09:22 +0000 (14:09 +0200)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Fri, 18 Sep 2020 12:16:01 +0000 (15:16 +0300)
commitfb43aa0acdfd600c75b8c877bdf9f6e9893ffc9b
treee1ac6036688d8f369a8a75373b7b4c0ab72a38f5
parent85649cc8dc509dfb97f5ac87f7efefe03539323a
drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge

Add a new DRM bridge driver for Cadence MHDP8546 DPTX IP used in TI J721E
SoC. MHDP DPTX IP is the component that complies with VESA DisplayPort (DP)
and embedded Display Port (eDP) standards. It integrates uCPU running the
embedded Firmware (FW) interfaced over APB interface.

Basically, it takes a DPI stream as input and outputs it encoded in DP
format. Currently, it supports only SST mode.

Co-developed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Co-developed-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
drivers/gpu/drm/bridge/Kconfig
drivers/gpu/drm/bridge/Makefile
drivers/gpu/drm/bridge/cadence/Kconfig [new file with mode: 0644]
drivers/gpu/drm/bridge/cadence/Makefile [new file with mode: 0644]
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c [new file with mode: 0644]
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h [new file with mode: 0644]