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clk: rockchip: fix wrong clock definitions for rk3328
authorJonas Karlman <jonas@kwiboo.se>
Sun, 10 Mar 2019 12:00:45 +0000 (12:00 +0000)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 18 Mar 2019 07:45:55 +0000 (08:45 +0100)
commitfb903392131a324a243c7731389277db1cd9f8df
tree72acd497874c7eb10e630f63259d185574ddcdb3
parent9e98c678c2d6ae3a17cb2de55d17f69dddaa231b
clk: rockchip: fix wrong clock definitions for rk3328

This patch fixes definition of several clock gate and select register
that is wrong for rk3328 referring to the TRM and vendor kernel.
Also use correct number of softrst registers.

Fix clock definition for:
- clk_crypto
- aclk_h265
- pclk_h265
- aclk_h264
- hclk_h264
- aclk_axisram
- aclk_gmac
- aclk_usb3otg

Fixes: fe3511ad8a1c ("clk: rockchip: add clock controller for rk3328")
Cc: stable@vger.kernel.org
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3328.c