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drm/i915: Power well id for ICL PG3
authorAnshuman Gupta <anshuman.gupta@intel.com>
Wed, 15 Apr 2020 17:05:52 +0000 (22:35 +0530)
committerUma Shankar <uma.shankar@intel.com>
Fri, 17 Apr 2020 07:42:02 +0000 (13:12 +0530)
commitfc4a8c16e34b2b0a8bd100e1b52dfbba5a8dd981
tree50361495b9ca19b29dfbd58067584c8715d1b621
parentb06ef327e26367b9286a2079b31cde8d2161c0d8
drm/i915: Power well id for ICL PG3

Gen11 onwards PG3 is contains functions for pipe B,
external displays, and VGA. It make sense to add
a power well id with name ICL_DISP_PW_3 rather then
TGL_DISP_PW_3, Also PG3 power well id requires to
know if lpsp is enabled.

Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200415170555.15531-2-anshuman.gupta@intel.com
drivers/gpu/drm/i915/display/intel_display_power.c
drivers/gpu/drm/i915/display/intel_display_power.h