- if (reg_nes_x < HSCAN_OAM_EVA_START) then\r
- --first 64 is oam clear.\r
- reg_s_oam_next_state <= REG_CLR0;\r
- elsif (reg_nes_x <= HSCAN) then\r
- --next until 256 is evaluate.\r
- --TODO: must add evaluation logic...\r
- reg_s_oam_next_state <= REG_CP0;\r
- else\r
- if (reg_nes_x mod 8 = 1) then\r
- reg_s_oam_next_state <= REG_NT0;\r
- elsif (reg_nes_x mod 8 = 3) then\r
- reg_s_oam_next_state <= REG_AT0;\r
- elsif (reg_nes_x mod 8 = 5) then\r
- reg_s_oam_next_state <= REG_PL0;\r
- elsif (reg_nes_x mod 8 = 7) then\r
- reg_s_oam_next_state <= REG_PH0;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- end if;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_CLR0 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(3) = '1') then\r
- reg_s_oam_next_state <= REG_CLR1;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_CLR1 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(0) = '1') then\r
- reg_s_oam_next_state <= REG_CLR2;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_CLR2 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(1) = '1') then\r
- reg_s_oam_next_state <= REG_CLR3;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_CLR3 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(2) = '1') then\r
- reg_s_oam_next_state <= AD_SET0;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_CP0 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(3) = '1') then\r
- reg_s_oam_next_state <= REG_CP1;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_CP1 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(0) = '1') then\r
- reg_s_oam_next_state <= REG_CP2;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_CP2 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(1) = '1') then\r
- reg_s_oam_next_state <= REG_CP3;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_CP3 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(2) = '1') then\r
- reg_s_oam_next_state <= AD_SET0;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_NT0 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(3) = '1') then\r
- reg_s_oam_next_state <= REG_NT1;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_NT1 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(0) = '1') then\r
- reg_s_oam_next_state <= REG_NT2;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_NT2 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(1) = '1') then\r
- reg_s_oam_next_state <= REG_NT3;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_NT3 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(2) = '1') then\r
- reg_s_oam_next_state <= AD_SET0;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_AT0 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(3) = '1') then\r
- reg_s_oam_next_state <= REG_AT1;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_AT1 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(0) = '1') then\r
- reg_s_oam_next_state <= REG_AT2;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_AT2 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(1) = '1') then\r
- reg_s_oam_next_state <= REG_AT3;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_AT3 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(2) = '1') then\r
- reg_s_oam_next_state <= AD_SET0;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_PL0 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(3) = '1') then\r
- reg_s_oam_next_state <= REG_PL1;\r
- else\r
- reg_s_oam_next_state <= reg_s_oam_cur_state;\r
- end if;\r
- when REG_PL1 =>\r
- if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
- reg_s_oam_next_state <= IDLE;\r
- elsif (pi_rnd_en(0) = '1') then\r
- reg_s_oam_next_state <= REG_PL2;\r