if((machine_id >= 0x0300) & ((machine_id & 0xff00) != 0x0400)) { // After UX
ex_int_enable = ((data & 0x20) != 0) ? true : false;
// Set host to 16bit bus width. BIT3 ,= '1'.
}
if(ctrl_reg & CTRL_WEN) {
d_host->write_signal(SIG_SCSI_RST, data, CTRL_RST);
if((machine_id >= 0x0300) & ((machine_id & 0xff00) != 0x0400)) { // After UX
ex_int_enable = ((data & 0x20) != 0) ? true : false;
// Set host to 16bit bus width. BIT3 ,= '1'.
}
if(ctrl_reg & CTRL_WEN) {
d_host->write_signal(SIG_SCSI_RST, data, CTRL_RST);