#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
}
if (phi->getNumOperands() == 3) {
- unsigned Input = phi->getOperand(1).getReg();
- unsigned Output = phi->getOperand(0).getReg();
-
- phi++->eraseFromParent();
+ const MachineOperand &Input = phi->getOperand(1);
+ const MachineOperand &Output = phi->getOperand(0);
+ unsigned InputReg = Input.getReg();
+ unsigned OutputReg = Output.getReg();
+ assert(Output.getSubReg() == 0 && "Cannot have output subregister");
ModifiedPHI = true;
- if (Input != Output) {
+ if (InputReg != OutputReg) {
MachineRegisterInfo &MRI = F.getRegInfo();
- MRI.constrainRegClass(Input, MRI.getRegClass(Output));
- MRI.replaceRegWith(Output, Input);
+ unsigned InputSub = Input.getSubReg();
+ if (InputSub == 0) {
+ MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg));
+ MRI.replaceRegWith(OutputReg, InputReg);
+ } else {
+ // The input register to the PHI has a subregister:
+ // insert a COPY instead of simply replacing the output
+ // with the input.
+ const TargetInstrInfo *TII = F.getSubtarget().getInstrInfo();
+ BuildMI(*BB, BB->getFirstNonPHI(), phi->getDebugLoc(),
+ TII->get(TargetOpcode::COPY), OutputReg)
+ .addReg(InputReg, getRegState(Input), InputSub);
+ }
+ phi++->eraseFromParent();
}
-
continue;
}
--- /dev/null
+# RUN: llc -march=hexagon -run-pass unreachable-mbb-elimination %s -o - | FileCheck %s
+
+---
+name: fred
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: %d0
+ successors: %bb.2
+
+ %0 : doubleregs = COPY %d0
+ J2_jump %bb.2, implicit-def %pc
+
+ bb.1:
+ successors: %bb.2
+ A2_nop
+
+ bb.2:
+ ; Make sure that the subregister from the PHI operand is preserved.
+ ; CHECK: %[[REG:[0-9]+]] = COPY %0.isub_lo
+ ; CHECK: %r0 = COPY %[[REG]]
+ %1 : intregs = PHI %0.isub_lo, %bb.0, %0.isub_hi, %bb.1
+ %r0 = COPY %1
+...
+