[General][VM][MZ2500] Merge upstream 2022-10-14.

diff --git a/source/history.txt b/source/history.txt
index e53eeeb..e9dc1cf 100644 (file)
--- a/source/history.txt
+++ b/source/history.txt
@@ -1,3 +1,8 @@
+10/14/2022
+
+[MZ2500/CRTC] fix vblank signal for GDEVS = GDEVE case
+
+
 10/12/2022
 
 [MZ1500] fix irq issue

diff --git a/source/revision.txt b/source/revision.txt
index cd24e80..93eed71 100644 (file)
--- a/source/revision.txt
+++ b/source/revision.txt
@@ -1,3 +1,3 @@
-<B><FONT SIZE=-1>Upstream 2022-10-12<BR>
-Qt Port and FM7 series 2023-03-06-tmp-2<BR>
+<B><FONT SIZE=-1>Upstream 2022-10-14<BR>
+Qt Port and FM7 series 2023-03-06-tmp-3<BR>
 </FONT></B>

diff --git a/source/src/res/credits.html b/source/src/res/credits.html
index 7aeb64e..e69633e 100644 (file)
--- a/source/src/res/credits.html
+++ b/source/src/res/credits.html
@@ -18,8 +18,8 @@
 </FONT>
 
 <DIV ALIGN=RIGHT><FONT SIZE=4>
-Upstream Version: 2022-10-12<BR>
-Qt Port and FM7 series 2023-03-06-tmp-2<BR>
+Upstream Version: 2022-10-14<BR>
+Qt Port and FM7 series 2023-03-06-tmp-3<BR>
 FFMPEG 5.1 + liblame 3.100 + libx264-164<BR>
 @@RevisionString@@
 </FONT></DIV>

diff --git a/source/src/vm/mz2500/crtc.cpp b/source/src/vm/mz2500/crtc.cpp
index 3062d19..3c8a8b8 100644 (file)
--- a/source/src/vm/mz2500/crtc.cpp
+++ b/source/src/vm/mz2500/crtc.cpp
@@ -673,17 +673,17 @@ void CRTC::event_vline(int v, int clock)
        }
 
        // vblank/hblank of graph screen
-       if(v == GDEVS) {
-               d_pio->write_signal(SIG_I8255_PORT_B, 1, 1);
-               d_int->write_signal(SIG_INTERRUPT_CRTC, 0, 1);
-               d_mem->write_signal(SIG_MEMORY_VBLANK_GRAPH, 0, 1);
-               vblank_g = false;
-       } else if(v == GDEVE) {
+       if(v == GDEVE) {
                d_pio->write_signal(SIG_I8255_PORT_B, 0, 1);
                d_int->write_signal(SIG_INTERRUPT_CRTC, 1, 1);
                d_mem->write_signal(SIG_MEMORY_VBLANK_GRAPH, 1, 1);
                vblank_g = true;
                clear_flag = 0;
+       } else if(v == GDEVS) {
+               d_pio->write_signal(SIG_I8255_PORT_B, 1, 1);
+               d_int->write_signal(SIG_INTERRUPT_CRTC, 0, 1);
+               d_mem->write_signal(SIG_MEMORY_VBLANK_GRAPH, 0, 1);
+               vblank_g = false;
        }
        if(GDEHS < GDEHE) {
                register_event_by_clock(this, EVENT_HDISP_GRAPH_S, (int)(clocks_per_char * (GDEHS + 10) + 0.5) - 2, false, NULL);