int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val)
{
struct {
- u16 tag;
- u16 min_lpn;
+ __le16 tag;
+ __le16 min_lpn;
} req = {
- .tag = 0x1,
- .min_lpn = val,
+ .tag = cpu_to_le16(0x1),
+ .min_lpn = cpu_to_le16(val),
};
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_TH, &req,
const struct mt7615_dfs_pulse *pulse)
{
struct {
- u16 tag;
- struct mt7615_dfs_pulse pulse;
+ __le16 tag;
+ __le32 max_width; /* us */
+ __le32 max_pwr; /* dbm */
+ __le32 min_pwr; /* dbm */
+ __le32 min_stgr_pri; /* us */
+ __le32 max_stgr_pri; /* us */
+ __le32 min_cr_pri; /* us */
+ __le32 max_cr_pri; /* us */
} req = {
- .tag = 0x3,
+ .tag = cpu_to_le16(0x3),
+#define __req_field(field) .field = cpu_to_le32(pulse->field)
+ __req_field(max_width),
+ __req_field(max_pwr),
+ __req_field(min_pwr),
+ __req_field(min_stgr_pri),
+ __req_field(max_stgr_pri),
+ __req_field(min_cr_pri),
+ __req_field(max_cr_pri),
+#undef __req_field
};
- memcpy(&req.pulse, pulse, sizeof(*pulse));
-
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_TH, &req,
sizeof(req), true);
}
const struct mt7615_dfs_pattern *pattern)
{
struct {
- u16 tag;
- u16 radar_type;
- struct mt7615_dfs_pattern pattern;
+ __le16 tag;
+ __le16 radar_type;
+ u8 enb;
+ u8 stgr;
+ u8 min_crpn;
+ u8 max_crpn;
+ u8 min_crpr;
+ u8 min_pw;
+ u8 max_pw;
+ __le32 min_pri;
+ __le32 max_pri;
+ u8 min_crbn;
+ u8 max_crbn;
+ u8 min_stgpn;
+ u8 max_stgpn;
+ u8 min_stgpr;
} req = {
- .tag = 0x2,
- .radar_type = index,
+ .tag = cpu_to_le16(0x2),
+ .radar_type = cpu_to_le16(index),
+#define __req_field_u8(field) .field = pattern->field
+#define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
+ __req_field_u8(enb),
+ __req_field_u8(stgr),
+ __req_field_u8(min_crpn),
+ __req_field_u8(max_crpn),
+ __req_field_u8(min_crpr),
+ __req_field_u8(min_pw),
+ __req_field_u8(max_pw),
+ __req_field_u32(min_pri),
+ __req_field_u32(max_pri),
+ __req_field_u8(min_crbn),
+ __req_field_u8(max_crbn),
+ __req_field_u8(min_stgpn),
+ __req_field_u8(max_stgpn),
+ __req_field_u8(min_stgpr),
+#undef __req_field_u8
+#undef __req_field_u32
};
- memcpy(&req.pattern, pattern, sizeof(*pattern));
-
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_TH, &req,
sizeof(req), true);
}
u8 pulse_num;
u8 rsv[3];
struct {
- u32 start_time;
- u16 width;
- s16 power;
+ __le32 start_time;
+ __le16 width;
+ __le16 power;
} pattern[32];
} req = {
.pulse_num = dev->radar_pattern.n_pulses,
/* TODO: add some noise here */
for (i = 0; i < dev->radar_pattern.n_pulses; i++) {
- req.pattern[i].width = dev->radar_pattern.width;
- req.pattern[i].power = dev->radar_pattern.power;
- req.pattern[i].start_time = start_time +
- i * dev->radar_pattern.period;
+ u32 ts = start_time + i * dev->radar_pattern.period;
+
+ req.pattern[i].width = cpu_to_le16(dev->radar_pattern.width);
+ req.pattern[i].power = cpu_to_le16(dev->radar_pattern.power);
+ req.pattern[i].start_time = cpu_to_le32(ts);
}
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_PATTERN,