clock_fast = false;
break;
}
- if(clock_fast) {
- prev_clock = SUBCLOCK_NORMAL;
- } else {
- prev_clock = SUBCLOCK_SLOW;
- }
+
enter_display();
offset_point = 0;
vram_wrote_shadow = true;
for(i = 0; i < 411 * 5; i++) vram_wrote_table[i] = true;
- for(i = 0; i < 411; i++) vram_draw_table[i] = true;
+ for(i = 0; i < 411; i++) vram_draw_table[i] = false;
displine = 0;
active_page = 0;
emu->set_vm_screen_lines(200);
is_cyclesteal = ((config.dipswitch & FM7_DIPSW_CYCLESTEAL) != 0) ? true : false;
+ switch(config.cpu_type){
+ case 0:
+ clock_fast = true;
+ break;
+ case 1:
+ clock_fast = false;
+ break;
+ }
+ if(clock_fast) {
+ prev_clock = SUBCLOCK_NORMAL;
+ } else {
+ prev_clock = SUBCLOCK_SLOW;
+ }
reset_some_devices();
#if defined(_FM77AV_VARIANTS)
void DISPLAY::enter_display(void)
{
uint32_t subclock;
+
if(clock_fast) {
subclock = SUBCLOCK_NORMAL;
} else {
subclock = SUBCLOCK_SLOW;
}
- if(!is_cyclesteal && vram_accessflag) {
+ if(!(is_cyclesteal) && (vram_accessflag)) {
subclock = subclock / 3;
}
- if(prev_clock != subclock) p_vm->set_cpu_clock(subcpu, subclock);
+ if(prev_clock != subclock) {
+ p_vm->set_cpu_clock(subcpu, subclock);
+ }
prev_clock = subclock;
}
+
void DISPLAY::leave_display(void)
{
}
uint8_t DISPLAY::set_vramaccess(void)
{
vram_accessflag = true;
+ //enter_display();
return 0xff;
}
void DISPLAY::reset_vramaccess(void)
{
vram_accessflag = false;
+ //enter_display();
}
//SUB:D40A:R
if(addr >= 0xd500) {
return submem_hidden[addr - 0xd500];
}
+ return 0xff;
}
#endif
EVENT_FM7SUB_CLR_CRTFLAG,
EVENT_FM7SUB_PROC,
EVENT_PRINTER_RESET_COMPLETED,
+ EVENT_FM7MAINMEM_WAIT_START,
+ EVENT_FM7MAINMEM_WAIT_STOP,
};
uint32_t read_bios(const _TCHAR *name, uint8_t *ptr, uint32_t size);
void draw_screen2();
-//#if defined(_FM77AV_VARIANTS) || defined(_FM77L4)
void event_callback_vstart(void);
void event_callback_vsync(void);
void event_callback_hdisp(void);
void event_callback_hblank(void);
-//#endif
- public:
+
+public:
DISPLAY(VM *parent_vm, EMU *parent_emu);
~DISPLAY();
void event_callback(int event_id, int err);