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drm/amd/display: Always wait for update lock status
authorEric Bernstein <eric.bernstein@amd.com>
Wed, 14 Jul 2021 18:21:08 +0000 (14:21 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 28 Jul 2021 20:37:17 +0000 (16:37 -0400)
Remove code that would skip wait for lock status for Diags
FPGA case

Reviewed-by: Laktyushkin Dmytro <dmytro.laktyushkin@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c

index f37e825..089be73 100644 (file)
@@ -109,11 +109,9 @@ void optc3_lock(struct timing_generator *optc)
        REG_SET(OTG_MASTER_UPDATE_LOCK, 0,
                OTG_MASTER_UPDATE_LOCK, 1);
 
-       /* Should be fast, status does not update on maximus */
-       if (optc->ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS)
-               REG_WAIT(OTG_MASTER_UPDATE_LOCK,
-                               UPDATE_LOCK_STATUS, 1,
-                               1, 10);
+       REG_WAIT(OTG_MASTER_UPDATE_LOCK,
+                       UPDATE_LOCK_STATUS, 1,
+                       1, 10);
 }
 
 void optc3_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest)