[AArch64][Kryo] Add missing write latency for LDAXP, LDXP second destination.

Fixes PR33491 and PR33512.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305751 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64SchedKryoDetails.td b/lib/Target/AArch64/AArch64SchedKryoDetails.td
index 02ccccc..cf4cdab 100644 (file)
--- a/lib/Target/AArch64/AArch64SchedKryoDetails.td
+++ b/lib/Target/AArch64/AArch64SchedKryoDetails.td
@@ -1374,7 +1374,9 @@ def KryoWrite_3cyc_LS_LS_400ln :
        let Latency = 3; let NumMicroOps = 2;
 }
 def : InstRW<[KryoWrite_3cyc_LS_LS_400ln],
-       (instregex "(LDAX?R(B|H|W|X)|LDAXP(W|X))")>;
+       (instregex "LDAX?R(B|H|W|X)")>;
+def : InstRW<[KryoWrite_3cyc_LS_LS_400ln, WriteLDHi],
+       (instregex "LDAXP(W|X)")>;
 def KryoWrite_3cyc_LS_LS_401ln :
        SchedWriteRes<[KryoUnitLS, KryoUnitLS]> {
        let Latency = 3; let NumMicroOps = 2;
@@ -1565,7 +1567,7 @@ def KryoWrite_3cyc_LS_258ln :
        SchedWriteRes<[KryoUnitLS]> {
        let Latency = 3; let NumMicroOps = 1;
 }
-def : InstRW<[KryoWrite_3cyc_LS_258ln],
+def : InstRW<[KryoWrite_3cyc_LS_258ln, WriteLDHi],
        (instregex "LDXP(W|X)")>;
 def KryoWrite_3cyc_LS_258_1ln :
        SchedWriteRes<[KryoUnitLS]> {