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target/mips: introduce MTTCG-enabled builds
authorAleksandar Markovic <amarkovic@wavecomp.com>
Mon, 11 Feb 2019 16:09:29 +0000 (17:09 +0100)
committerAleksandar Markovic <amarkovic@wavecomp.com>
Thu, 14 Feb 2019 16:47:28 +0000 (17:47 +0100)
Introduce MTTCG-enabled QEMU builds for mips32, mipsn32, and mips64.

Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
configure
target/mips/cpu.h

index fbd0825..f0f7518 100755 (executable)
--- a/configure
+++ b/configure
@@ -7192,11 +7192,13 @@ case "$target_name" in
     target_compiler=$cross_cc_microblaze
   ;;
   mips|mipsel)
+    mttcg="yes"
     TARGET_ARCH=mips
     target_compiler=$cross_cc_mips
     echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak
   ;;
   mipsn32|mipsn32el)
+    mttcg="yes"
     TARGET_ARCH=mips64
     TARGET_BASE_ARCH=mips
     target_compiler=$cross_cc_mipsn32
@@ -7204,6 +7206,7 @@ case "$target_name" in
     echo "TARGET_ABI32=y" >> $config_target_mak
   ;;
   mips64|mips64el)
+    mttcg="yes"
     TARGET_ARCH=mips64
     TARGET_BASE_ARCH=mips
     target_compiler=$cross_cc_mips64
index eccee37..a10eeb0 100644 (file)
@@ -11,6 +11,8 @@
 #include "exec/cpu-defs.h"
 #include "fpu/softfloat.h"
 
+#define TCG_GUEST_DEFAULT_MO (0)
+
 struct CPUMIPSState;
 
 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext;