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net: mtk_eth_soc: tidy mtk_gmac0_rgmii_adjust()
authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tue, 7 Mar 2023 16:19:26 +0000 (16:19 +0000)
committerPaolo Abeni <pabeni@redhat.com>
Thu, 9 Mar 2023 08:51:31 +0000 (09:51 +0100)
Get rid of the multiple tenary operators in mtk_gmac0_rgmii_adjust()
replacing them with a single if(), thus making the code easier to read.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/mediatek/mtk_eth_soc.c

index 14be6ea..c63f179 100644 (file)
@@ -397,38 +397,42 @@ static int mt7621_gmac0_rgmii_adjust(struct mtk_eth *eth,
 static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth,
                                   phy_interface_t interface, int speed)
 {
-       u32 val;
+       unsigned long rate;
+       u32 tck, rck, intf;
        int ret;
 
        if (interface == PHY_INTERFACE_MODE_TRGMII) {
                mtk_w32(eth, TRGMII_MODE, INTF_MODE);
-               val = 500000000;
-               ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], val);
+               ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], 500000000);
                if (ret)
                        dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret);
                return;
        }
 
-       val = (speed == SPEED_1000) ?
-               INTF_MODE_RGMII_1000 : INTF_MODE_RGMII_10_100;
-       mtk_w32(eth, val, INTF_MODE);
+       if (speed == SPEED_1000) {
+               intf = INTF_MODE_RGMII_1000;
+               rate = 250000000;
+               rck = RCK_CTRL_RGMII_1000;
+               tck = TCK_CTRL_RGMII_1000;
+       } else {
+               intf = INTF_MODE_RGMII_10_100;
+               rate = 500000000;
+               rck = RCK_CTRL_RGMII_10_100;
+               tck = TCK_CTRL_RGMII_10_100;
+       }
+
+       mtk_w32(eth, intf, INTF_MODE);
 
        regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0,
                           ETHSYS_TRGMII_CLK_SEL362_5,
                           ETHSYS_TRGMII_CLK_SEL362_5);
 
-       val = (speed == SPEED_1000) ? 250000000 : 500000000;
-       ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], val);
+       ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], rate);
        if (ret)
                dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret);
 
-       val = (speed == SPEED_1000) ?
-               RCK_CTRL_RGMII_1000 : RCK_CTRL_RGMII_10_100;
-       mtk_w32(eth, val, TRGMII_RCK_CTRL);
-
-       val = (speed == SPEED_1000) ?
-               TCK_CTRL_RGMII_1000 : TCK_CTRL_RGMII_10_100;
-       mtk_w32(eth, val, TRGMII_TCK_CTRL);
+       mtk_w32(eth, rck, TRGMII_RCK_CTRL);
+       mtk_w32(eth, tck, TRGMII_TCK_CTRL);
 }
 
 static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config,