#include <rtw_efuse.h>
#include <rtl8723a_hal.h>
+#include <usb_ops_linux.h>
/*------------------------Define local variable------------------------------*/
/* 1.2V Power: From VDDON with Power
Cut(0x0000h[15]), defualt valid */
- tmpV16 = rtw_read16(padapter, REG_SYS_ISO_CTRL);
+ tmpV16 = rtl8723au_read16(padapter, REG_SYS_ISO_CTRL);
if (!(tmpV16 & PWC_EV12V)) {
tmpV16 |= PWC_EV12V;
rtw_write16(padapter, REG_SYS_ISO_CTRL, tmpV16);
}
/* Reset: 0x0000h[28], default valid */
- tmpV16 = rtw_read16(padapter, REG_SYS_FUNC_EN);
+ tmpV16 = rtl8723au_read16(padapter, REG_SYS_FUNC_EN);
if (!(tmpV16 & FEN_ELDR)) {
tmpV16 |= FEN_ELDR;
rtw_write16(padapter, REG_SYS_FUNC_EN, tmpV16);
/* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock
from ANA, default valid */
- tmpV16 = rtw_read16(padapter, REG_SYS_CLKR);
+ tmpV16 = rtl8723au_read16(padapter, REG_SYS_CLKR);
if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) {
tmpV16 |= (LOADER_CLK_EN | ANA8M);
rtw_write16(padapter, REG_SYS_CLKR, tmpV16);
if (bWrite == true) {
/* Enable LDO 2.5V before read/write action */
- tempval = rtw_read8(padapter, EFUSE_TEST + 3);
+ tempval = rtl8723au_read8(padapter, EFUSE_TEST + 3);
tempval &= 0x0F;
tempval |= (VOLTAGE_V25 << 4);
rtw_write8(padapter, EFUSE_TEST + 3, (tempval | 0x80));
if (bWrite == true) {
/* Disable LDO 2.5V after read/write action */
- tempval = rtw_read8(padapter, EFUSE_TEST + 3);
+ tempval = rtl8723au_read8(padapter, EFUSE_TEST + 3);
rtw_write8(padapter, EFUSE_TEST + 3, (tempval & 0x7F));
}
}
/* Write Address */
rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff));
- readbyte = rtw_read8(Adapter, EFUSE_CTRL+2);
+ readbyte = rtl8723au_read8(Adapter, EFUSE_CTRL+2);
rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
/* Write bit 32 0 */
- readbyte = rtw_read8(Adapter, EFUSE_CTRL+3);
+ readbyte = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f));
/* Check bit 32 read-ready */
retry = 0;
- value32 = rtw_read32(Adapter, EFUSE_CTRL);
+ value32 = rtl8723au_read32(Adapter, EFUSE_CTRL);
/* while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10)) */
while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10000))
{
- value32 = rtw_read32(Adapter, EFUSE_CTRL);
+ value32 = rtl8723au_read32(Adapter, EFUSE_CTRL);
retry++;
}
/* Designer says that there shall be some delay after ready bit is set, or the */
/* result will always stay on last data we read. */
udelay(50);
- value32 = rtw_read32(Adapter, EFUSE_CTRL);
+ value32 = rtl8723au_read32(Adapter, EFUSE_CTRL);
*pbuf = (u8)(value32 & 0xff);
}
/* Write E-fuse Register address bit0~7 */
temp = Address & 0xFF;
rtw_write8(Adapter, EFUSE_CTRL+1, temp);
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2);
+ Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+2);
/* Write E-fuse Register address bit8~9 */
temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
rtw_write8(Adapter, EFUSE_CTRL+2, temp);
/* Write 0x30[31]= 0 */
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+ Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
temp = Bytetemp & 0x7F;
rtw_write8(Adapter, EFUSE_CTRL+3, temp);
/* Wait Write-ready (0x30[31]= 1) */
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+ Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
while(!(Bytetemp & 0x80))
{
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+ Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
k++;
if (k == 1000)
{
break;
}
}
- data = rtw_read8(Adapter, EFUSE_CTRL);
+ data = rtl8723au_read8(Adapter, EFUSE_CTRL);
return data;
}
else
/* Write E-fuse Register address bit0~7 */
temp = Address & 0xFF;
rtw_write8(Adapter, EFUSE_CTRL+1, temp);
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2);
+ Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+2);
/* Write E-fuse Register address bit8~9 */
temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
rtw_write8(Adapter, EFUSE_CTRL+2, temp);
/* Write 0x30[31]= 1 */
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+ Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
temp = Bytetemp | 0x80;
rtw_write8(Adapter, EFUSE_CTRL+3, temp);
/* Wait Write-ready (0x30[31]= 0) */
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+ Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
while(Bytetemp & 0x80)
{
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+ Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
k++;
if (k == 100)
{
/* address */
rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03)) |
- (rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC));
+ (rtl8723au_read8(pAdapter, EFUSE_CTRL+2)&0xFC));
rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72);/* read cmd */
- while(!(0x80 &rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100))
+ while(!(0x80 &rtl8723au_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100))
tmpidx++;
if (tmpidx < 100) {
- *data = rtw_read8(pAdapter, EFUSE_CTRL);
+ *data = rtl8723au_read8(pAdapter, EFUSE_CTRL);
bResult = _SUCCESS;
} else {
*data = 0xff;
/* address */
rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
rtw_write8(pAdapter, EFUSE_CTRL+2,
- (rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC)|(u8)((addr>>8)&0x03));
+ (rtl8723au_read8(pAdapter, EFUSE_CTRL+2)&0xFC)|(u8)((addr>>8)&0x03));
rtw_write8(pAdapter, EFUSE_CTRL, data);/* data */
rtw_write8(pAdapter, EFUSE_CTRL+3, 0xF2);/* write cmd */
- while((0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100)) {
+ while((0x80 & rtl8723au_read8(pAdapter, EFUSE_CTRL+3)) &&
+ (tmpidx<100)) {
tmpidx++;
}
#include <usb_ops.h>
-u8 _rtw_read823a(struct rtw_adapter *adapter, u32 addr)
-{
- u8 r_val;
- struct _io_ops *io_ops = &adapter->io_ops;
-
- r_val = io_ops->_read8(adapter, addr);
-
- return r_val;
-}
-
-u16 _rtw_read1623a(struct rtw_adapter *adapter, u32 addr)
-{
- struct _io_ops *io_ops = &adapter->io_ops;
-
- return io_ops->_read16(adapter, addr);
-}
-
-u32 _rtw_read3223a(struct rtw_adapter *adapter, u32 addr)
-{
- struct _io_ops *io_ops = &adapter->io_ops;
-
- return io_ops->_read32(adapter, addr);
-}
-
int _rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val)
{
struct _io_ops *io_ops = &adapter->io_ops;
#ifdef CONFIG_8723AU_BT_COEXIST
#include <rtl8723a_hal.h>
#endif
+#include <usb_ops_linux.h>
void ips_enter23a(struct rtw_adapter * padapter)
{
}
DBG_8723A("==> ips_leave23a.....LED(0x%08x)...\n",
- rtw_read32(padapter, 0x4c));
+ rtl8723au_read32(padapter, 0x4c));
pwrpriv->bips_processing = false;
pwrpriv->bkeepfwalive = false;
******************************************************************************/
#include <rtw_sreset.h>
+#include <usb_ops_linux.h>
void rtw_sreset_init(struct rtw_adapter *padapter)
{
if (psrtpriv->silent_reset_inprogress)
return status;
- val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
+ val32 = rtl8723au_read32(padapter, REG_TXDMA_STATUS);
if (val32 == 0xeaeaeaea) {
psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
} else if (val32 != 0) {
/* include files */
#include "odm_precomp.h"
+#include <usb_ops_linux.h>
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
u32 i;
for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) {
- MACBackup[i] = rtw_read8(pAdapter, MACReg[i]);
+ MACBackup[i] = rtl8723au_read8(pAdapter, MACReg[i]);
}
- MACBackup[i] = rtw_read32(pAdapter, MACReg[i]);
+ MACBackup[i] = rtl8723au_read32(pAdapter, MACReg[i]);
}
static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum)
u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal;
/* Check continuous TX and Packet TX */
- tmpReg = rtw_read8(pAdapter, 0xd03);
+ tmpReg = rtl8723au_read8(pAdapter, 0xd03);
if ((tmpReg&0x70) != 0) /* Deal with contisuous TX case */
rtw_write8(pAdapter, 0xd03, tmpReg&0x8F); /* disable all continuous TX */
--*/
#include <HalPwrSeqCmd.h>
+#include <usb_ops_linux.h>
/* */
/* Description: */
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
/* Read the value from system register */
- value = rtw_read8(padapter, offset);
+ value = rtl8723au_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) &
bPollingBit = false;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
do {
- value = rtw_read8(padapter, offset);
+ value = rtl8723au_read8(padapter,
+ offset);
value &= GET_PWR_CFG_MASK(PwrCfgCmd);
if (value ==
#include <hal_intf.h>
#include <hal_com.h>
#include <rtl8723a_hal.h>
+#include <usb_ops_linux.h>
#define _HAL_INIT_C_
rtw_write8(padapter, REG_RRSR, brate_cfg & 0xff);
rtw_write8(padapter, REG_RRSR + 1, (brate_cfg >> 8) & 0xff);
rtw_write8(padapter, REG_RRSR + 2,
- rtw_read8(padapter, REG_RRSR + 2) & 0xf0);
+ rtl8723au_read8(padapter, REG_RRSR + 2) & 0xf0);
rate_index = 0;
/* Set RTS initial rate */
if (buf == NULL)
goto exit;
- trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
+ trigger = rtl8723au_read8(adapter, REG_C2HEVT_CLEAR);
if (trigger == C2H_EVT_HOST_CLOSE)
goto exit; /* Not ready */
memset(c2h_evt, 0, 16);
- *buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
- *(buf + 1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
+ *buf = rtl8723au_read8(adapter, REG_C2HEVT_MSG_NORMAL);
+ *(buf + 1) = rtl8723au_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read23a(): ",
&c2h_evt, sizeof(c2h_evt));
/* Read the content */
for (i = 0; i < c2h_evt->plen; i++)
- c2h_evt->payload[i] = rtw_read8(adapter,
+ c2h_evt->payload[i] = rtl8723au_read8(adapter,
REG_C2HEVT_MSG_NORMAL +
sizeof(*c2h_evt) + i);
("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
padapter->MgntInfo.MinSpaceCfg)); */
MinSpacingToSet |=
- rtw_read8(padapter, REG_AMPDU_MIN_SPACE) & 0xf8;
+ rtl8723au_read8(padapter, REG_AMPDU_MIN_SPACE) & 0xf8;
rtw_write8(padapter, REG_AMPDU_MIN_SPACE,
MinSpacingToSet);
}
{
u8 val8;
- val8 = rtw_read8(padapter, MSR) & 0x0c;
+ val8 = rtl8723au_read8(padapter, MSR) & 0x0c;
val8 |= status;
rtw_write8(padapter, MSR, val8);
}
{
u8 val8;
- val8 = rtw_read8(padapter, MSR) & 0x03;
+ val8 = rtl8723au_read8(padapter, MSR) & 0x03;
val8 |= status << 2;
rtw_write8(padapter, MSR, val8);
}
void rtl8723a_check_bssid(struct rtw_adapter *padapter, u8 val)
{
u32 val32;
- val32 = rtw_read32(padapter, REG_RCR);
+ val32 = rtl8723au_read32(padapter, REG_RCR);
if (val)
val32 |= RCR_CBSSID_DATA | RCR_CBSSID_BCN;
else
/* config RCR to receive different BSSID & not
to receive data frame */
- v32 = rtw_read32(padapter, REG_RCR);
+ v32 = rtl8723au_read32(padapter, REG_RCR);
v32 &= ~(RCR_CBSSID_BCN);
rtw_write32(padapter, REG_RCR, v32);
/* reject all data frame */
SetBcnCtrlReg23a(padapter, 0, DIS_TSF_UDT);
}
- v32 = rtw_read32(padapter, REG_RCR);
+ v32 = rtl8723au_read32(padapter, REG_RCR);
v32 |= RCR_CBSSID_BCN;
rtw_write32(padapter, REG_RCR, v32);
}
void rtl8723a_on_rcr_am(struct rtw_adapter *padapter)
{
- rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR) | RCR_AM);
+ rtw_write32(padapter, REG_RCR,
+ rtl8723au_read32(padapter, REG_RCR) | RCR_AM);
DBG_8723A("%s, %d, RCR = %x \n", __FUNCTION__, __LINE__,
- rtw_read32(padapter, REG_RCR));
+ rtl8723au_read32(padapter, REG_RCR));
}
void rtl8723a_off_rcr_am(struct rtw_adapter *padapter)
{
rtw_write32(padapter, REG_RCR,
- rtw_read32(padapter, REG_RCR) & (~RCR_AM));
+ rtl8723au_read32(padapter, REG_RCR) & (~RCR_AM));
DBG_8723A("%s, %d, RCR = %x \n", __FUNCTION__, __LINE__,
- rtw_read32(padapter, REG_RCR));
+ rtl8723au_read32(padapter, REG_RCR));
}
void rtl8723a_set_slot_time(struct rtw_adapter *padapter, u8 slottime)
rtw_write8(padapter, REG_TXPAUSE, 0xff);
/* keep sn */
- padapter->xmitpriv.nqos_ssn = rtw_read16(padapter, REG_NQOS_SEQ);
+ padapter->xmitpriv.nqos_ssn = rtl8723au_read16(padapter, REG_NQOS_SEQ);
if (pwrpriv->bkeepfwalive != true) {
u32 v32;
/* RX DMA stop */
- v32 = rtw_read32(padapter, REG_RXPKT_NUM);
+ v32 = rtl8723au_read32(padapter, REG_RXPKT_NUM);
v32 |= RW_RELEASE_EN;
rtw_write32(padapter, REG_RXPKT_NUM, v32);
do {
- v32 = rtw_read32(padapter, REG_RXPKT_NUM) & RXDMA_IDLE;
+ v32 = rtl8723au_read32(padapter,
+ REG_RXPKT_NUM) & RXDMA_IDLE;
if (!v32)
break;
} while (trycnt--);
/* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2,
write 1 to clear, Clear by sw */
rtw_write8(padapter, REG_TDECTRL + 2,
- rtw_read8(padapter, REG_TDECTRL + 2) | BIT(0));
+ rtl8723au_read8(padapter, REG_TDECTRL + 2) | BIT(0));
}
bool rtl8723a_get_bcn_valid(struct rtw_adapter *padapter)
{
bool retval;
- retval = (rtw_read8(padapter, REG_TDECTRL + 2) & BIT(0)) ? true : false;
+ retval = (rtl8723au_read8(padapter, REG_TDECTRL + 2) & BIT(0)) ? true : false;
return retval;
}
not check Fw LPS Leave, because Fw is unload. */
retval = true;
} else {
- valRCR = rtw_read32(padapter, REG_RCR);
+ valRCR = rtl8723au_read32(padapter, REG_RCR);
if (valRCR & 0x00070000)
retval = false;
else
{
u32 hgq;
- hgq = rtw_read32(padapter, REG_HGQ_INFORMATION);
+ hgq = rtl8723au_read32(padapter, REG_HGQ_INFORMATION);
return ((hgq & 0x0000ff00) == 0) ? true : false;
}
******************************************************************************/
#include "odm_precomp.h"
+#include "usb_ops_linux.h"
static const u16 dB_Invert_Table[8][12] = {
{1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4},
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
for (index = 0; index < 6; index++)
- pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]);
+ pdmpriv->PowerIndex_backup[index] =
+ rtl8723au_read8(Adapter, Power_Index_REG[index]);
}
void odm_DynamicTxPower23aRestorePowerIndex(struct dm_odm_t *pDM_Odm)
/* */
/* ODM IO Relative API. */
/* */
+#include <usb_ops_linux.h>
u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm,
u32 RegAddr
{
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
- return rtw_read8(Adapter, RegAddr);
+ return rtl8723au_read8(Adapter, RegAddr);
}
-u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm,
- u32 RegAddr
- )
+u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
{
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
- return rtw_read16(Adapter, RegAddr);
+ return rtl8723au_read16(Adapter, RegAddr);
}
-u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm,
- u32 RegAddr
- )
+u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
{
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
- return rtw_read32(Adapter, RegAddr);
+ return rtl8723au_read32(Adapter, RegAddr);
}
void ODM_Write1Byte(
#include <drv_types.h>
#include <rtl8723a_hal.h>
#include <rtw_ioctl_set.h>
+#include <usb_ops_linux.h>
#define DIS_PS_RX_BCN
{
u8 oldVal, newVal;
- oldVal = rtw_read8(padapter, 0x550);
+ oldVal = rtl8723au_read8(padapter, 0x550);
if (enable)
newVal = oldVal | EN_BCN_FUNCTION;
regHPTxRx = REG_HIGH_PRIORITY_TXRX;
regLPTxRx = REG_LOW_PRIORITY_TXRX;
- u4Tmp = rtw_read32(padapter, regHPTxRx);
+ u4Tmp = rtl8723au_read32(padapter, regHPTxRx);
regHPTx = u4Tmp & bMaskLWord;
regHPRx = (u4Tmp & bMaskHWord)>>16;
- u4Tmp = rtw_read32(padapter, regLPTxRx);
+ u4Tmp = rtl8723au_read32(padapter, regLPTxRx);
regLPTx = u4Tmp & bMaskLWord;
regLPRx = (u4Tmp & bMaskHWord)>>16;
u8 val8;
/* ox68[28]= 1 => BT enable; otherwise disable */
- val8 = rtw_read8(padapter, 0x6B);
+ val8 = rtl8723au_read8(padapter, 0x6B);
if (!(val8 & BIT(4)))
btAlife = false;
struct hal_data_8723a *pHalData = GET_HAL_DATA(padapter);
u8 tmpU1;
- tmpU1 = rtw_read8(padapter, 0x4fd);
+ tmpU1 = rtl8723au_read8(padapter, 0x4fd);
tmpU1 |= BIT(0);
if (BT_TX_RATE_ADAPTIVE_LOW_PENALTY == raType) {
tmpU1 &= ~BIT(2);
pBtCoex->btdm2Ant.bCurDecBtPwr);
DCMD_Printf(btCoexDbgBuf);
}
- u1Tmp = rtw_read8(padapter, 0x778);
- u1Tmp1 = rtw_read8(padapter, 0x783);
- u1Tmp2 = rtw_read8(padapter, 0x796);
+ u1Tmp = rtl8723au_read8(padapter, 0x778);
+ u1Tmp1 = rtl8723au_read8(padapter, 0x783);
+ u1Tmp2 = rtl8723au_read8(padapter, 0x796);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \
u1Tmp, u1Tmp1, u1Tmp2);
DCMD_Printf(btCoexDbgBuf);
pBtCoex->btdm2Ant.bCurDacSwingOn, pBtCoex->btdm2Ant.curDacSwingLvl);
DCMD_Printf(btCoexDbgBuf);
}
- u4Tmp[0] = rtw_read32(padapter, 0x880);
+ u4Tmp[0] = rtl8723au_read32(padapter, 0x880);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \
u4Tmp[0]);
DCMD_Printf(btCoexDbgBuf);
DCMD_Printf(btCoexDbgBuf);
}
- u1Tmp = rtw_read8(padapter, 0x40);
+ u1Tmp = rtl8723au_read8(padapter, 0x40);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \
u1Tmp);
DCMD_Printf(btCoexDbgBuf);
- u4Tmp[0] = rtw_read32(padapter, 0x550);
- u1Tmp = rtw_read8(padapter, 0x522);
+ u4Tmp[0] = rtl8723au_read32(padapter, 0x550);
+ u1Tmp = rtl8723au_read8(padapter, 0x522);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x", "0x550(bcn contrl)/0x522", \
u4Tmp[0], u1Tmp);
DCMD_Printf(btCoexDbgBuf);
- u4Tmp[0] = rtw_read32(padapter, 0x484);
+ u4Tmp[0] = rtl8723au_read32(padapter, 0x484);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \
u4Tmp[0]);
DCMD_Printf(btCoexDbgBuf);
- u4Tmp[0] = rtw_read32(padapter, 0x50);
+ u4Tmp[0] = rtl8723au_read32(padapter, 0x50);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \
u4Tmp[0]);
DCMD_Printf(btCoexDbgBuf);
- u4Tmp[0] = rtw_read32(padapter, 0xda0);
- u4Tmp[1] = rtw_read32(padapter, 0xda4);
- u4Tmp[2] = rtw_read32(padapter, 0xda8);
- u4Tmp[3] = rtw_read32(padapter, 0xdac);
+ u4Tmp[0] = rtl8723au_read32(padapter, 0xda0);
+ u4Tmp[1] = rtl8723au_read32(padapter, 0xda4);
+ u4Tmp[2] = rtl8723au_read32(padapter, 0xda8);
+ u4Tmp[3] = rtl8723au_read32(padapter, 0xdac);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \
u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]);
DCMD_Printf(btCoexDbgBuf);
- u4Tmp[0] = rtw_read32(padapter, 0x6c0);
- u4Tmp[1] = rtw_read32(padapter, 0x6c4);
- u4Tmp[2] = rtw_read32(padapter, 0x6c8);
- u1Tmp = rtw_read8(padapter, 0x6cc);
+ u4Tmp[0] = rtl8723au_read32(padapter, 0x6c0);
+ u4Tmp[1] = rtl8723au_read32(padapter, 0x6c4);
+ u4Tmp[2] = rtl8723au_read32(padapter, 0x6c8);
+ u1Tmp = rtl8723au_read8(padapter, 0x6cc);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \
u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp);
DCMD_Printf(btCoexDbgBuf);
- /* u4Tmp = rtw_read32(padapter, 0x770); */
+ /* u4Tmp = rtl8723au_read32(padapter, 0x770); */
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x770(Hi pri Rx[31:16]/Tx[15:0])", \
pHalData->bt_coexist.halCoex8723.highPriorityRx,
pHalData->bt_coexist.halCoex8723.highPriorityTx);
DCMD_Printf(btCoexDbgBuf);
- /* u4Tmp = rtw_read32(padapter, 0x774); */
+ /* u4Tmp = rtl8723au_read32(padapter, 0x774); */
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x774(Lo pri Rx[31:16]/Tx[15:0])", \
pHalData->bt_coexist.halCoex8723.lowPriorityRx,
pHalData->bt_coexist.halCoex8723.lowPriorityTx);
DCMD_Printf(btCoexDbgBuf);
/* Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang */
- u1Tmp = rtw_read8(padapter, 0x41b);
+ u1Tmp = rtl8723au_read8(padapter, 0x41b);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (hang chk == 0xf)", \
u1Tmp);
DCMD_Printf(btCoexDbgBuf);
else
regBTPolling = REG_BT_POLLING;
- BT_Active = rtw_read32(padapter, regBTActive);
+ BT_Active = rtl8723au_read32(padapter, regBTActive);
RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Active(0x%x) =%x\n", regBTActive, BT_Active));
BT_Active = BT_Active & 0x00ffffff;
- BT_State = rtw_read32(padapter, regBTState);
+ BT_State = rtl8723au_read32(padapter, regBTState);
RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_State(0x%x) =%x\n", regBTState, BT_State));
BT_State = BT_State & 0x00ffffff;
- BT_Polling = rtw_read32(padapter, regBTPolling);
+ BT_Polling = rtl8723au_read32(padapter, regBTPolling);
RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Polling(0x%x) =%x\n", regBTPolling, BT_Polling));
if (BT_Active == 0xffffffff && BT_State == 0xffffffff && BT_Polling == 0xffffffff)
pHalData->odmpriv.DM_EDCA_Table.bCurrentTurboEDCA = false;
pHalData->dmpriv.prv_traffic_idx = 3;
}
- cur_EDCA_reg = rtw_read32(padapter, REG_EDCA_BE_PARAM);
+ cur_EDCA_reg = rtl8723au_read32(padapter, REG_EDCA_BE_PARAM);
if (cur_EDCA_reg != EDCA_BT_BE)
bBtChangeEDCA = true;
#include <mlme_osdep.h>
#include <rtw_ioctl_set.h>
#include <rtl8723a_hal.h>
+#include <usb_ops_linux.h>
#define RTL92C_MAX_H2C_BOX_NUMS 4
#define RTL92C_MAX_CMD_LEN 5
u8 valid;
do {
- valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num);
+ valid = rtl8723au_read8(padapter, REG_HMETFR) & BIT(msgbox_num);
if (0 == valid)
read_down = true;
} while ((!read_down) && (retry_cnts--));
/* rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); */
/* set REG_CR bit 8 */
- v8 = rtw_read8(padapter, REG_CR+1);
+ v8 = rtl8723au_read8(padapter, REG_CR+1);
v8 |= BIT(0); /* ENSWBCN */
rtw_write8(padapter, REG_CR+1, v8);
bRecover = true;
/* To tell Hw the packet is not a real beacon frame. */
- /* U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); */
+ /* U1bTmp = rtl8723au_read8(padapter, REG_FWHW_TXQ_CTRL+2); */
rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl & ~BIT(6));
pHalData->RegFwHwTxQCtrl &= ~BIT(6);
SetFwRsvdPagePkt(padapter, 0);
}
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
- v8 = rtw_read8(padapter, REG_CR+1);
+ v8 = rtl8723au_read8(padapter, REG_CR+1);
v8 &= ~BIT(0); /* ~ENSWBCN */
rtw_write8(padapter, REG_CR+1, v8);
}
#include <drv_types.h>
#include <rtl8723a_hal.h>
+#include <usb_ops_linux.h>
/* */
/* Global var */
if (!padapter->registrypriv.hw_wps_pbc)
return;
- tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
+ tmp1byte = rtl8723au_read8(padapter, GPIO_IO_SEL);
tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */
- tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
+ tmp1byte = rtl8723au_read8(padapter, GPIO_IO_SEL);
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */
- tmp1byte = rtw_read8(padapter, GPIO_IN);
+ tmp1byte = rtl8723au_read8(padapter, GPIO_IN);
if (tmp1byte == 0xff)
return;
ODM23a_DMInit(pDM_Odm);
/* Save REG_INIDATA_RATE_SEL value for TXDESC. */
for (i = 0; i < 32; i++)
- pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f;
+ pdmpriv->INIDATA_RATE[i] = rtl8723au_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f;
}
void
/* Read REG_INIDATA_RATE_SEL value for TXDESC. */
if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) {
- pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
+ pdmpriv->INIDATA_RATE[0] = rtl8723au_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
} else {
u8 i;
for (i = 1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++)
- pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
+ pdmpriv->INIDATA_RATE[i] = rtl8723au_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
}
}
#include <rtw_efuse.h>
#include <rtl8723a_hal.h>
+#include <usb_ops_linux.h>
static void _FWDownloadEnable(struct rtw_adapter *padapter, bool enable)
{
if (enable) {
/* 8051 enable */
- tmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
+ tmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1);
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, tmp | 0x04);
/* MCU firmware download enable. */
- tmp = rtw_read8(padapter, REG_MCUFWDL);
+ tmp = rtl8723au_read8(padapter, REG_MCUFWDL);
rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01);
/* 8051 reset */
- tmp = rtw_read8(padapter, REG_MCUFWDL + 2);
+ tmp = rtl8723au_read8(padapter, REG_MCUFWDL + 2);
rtw_write8(padapter, REG_MCUFWDL + 2, tmp & 0xf7);
} else {
/* MCU firmware download disable. */
- tmp = rtw_read8(padapter, REG_MCUFWDL);
+ tmp = rtl8723au_read8(padapter, REG_MCUFWDL);
rtw_write8(padapter, REG_MCUFWDL, tmp & 0xfe);
/* Reserved for fw extension. */
u8 value8;
u8 u8Page = (u8) (page & 0x07);
- value8 = (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page;
+ value8 = (rtl8723au_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page;
rtw_write8(padapter, REG_MCUFWDL + 2, value8);
return _BlockWrite(padapter, buffer, size);
/* polling CheckSum report */
do {
- value32 = rtw_read32(padapter, REG_MCUFWDL);
+ value32 = rtl8723au_read32(padapter, REG_MCUFWDL);
if (value32 & FWDL_ChkSum_rpt)
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__,
value32));
- value32 = rtw_read32(padapter, REG_MCUFWDL);
+ value32 = rtl8723au_read32(padapter, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
value32 &= ~WINTINI_RDY;
rtw_write32(padapter, REG_MCUFWDL, value32);
/* polling for FW ready */
counter = 0;
do {
- value32 = rtw_read32(padapter, REG_MCUFWDL);
+ value32 = rtl8723au_read32(padapter, REG_MCUFWDL);
if (value32 & WINTINI_RDY) {
RT_TRACE(_module_hal_init_c_, _drv_info_,
("%s: Polling FW ready success!! "
/* 0x1cf = 0x20. Inform 8051 to reset. 2009.12.25. tynli_test */
rtw_write8(padapter, REG_HMETFR + 3, 0x20);
- u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
+ u1bTmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1);
while (u1bTmp & BIT(2)) {
Delay--;
if (Delay == 0)
break;
udelay(50);
- u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
+ u1bTmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1);
}
RT_TRACE(_module_hal_init_c_, _drv_info_,
("-%s: 8051 reset success (%d)\n", __func__,
if ((Delay == 0)) {
/* force firmware reset */
- u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
+ u1bTmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1);
rtw_write8(padapter, REG_SYS_FUNC_EN + 1,
u1bTmp & ~BIT(2));
}
/* Suggested by Filen. If 8051 is running in RAM code, driver should
inform Fw to reset by itself, */
/* or it will cause download Fw fail. 2010.02.01. by tynli. */
- if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) {
+ if (rtl8723au_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) {
/* 8051 RAM code */
rtl8723a_FirmwareSelfReset(padapter);
rtw_write8(padapter, REG_MCUFWDL, 0x00);
while (1) {
/* reset the FWDL chksum */
rtw_write8(padapter, REG_MCUFWDL,
- rtw_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt);
+ rtl8723au_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt);
rtStatus = _WriteFW(padapter, buf, fw_size);
u32 value32 = 0;
DBG_8723A("%s: Efuse switch bank to %d\n", __func__, bank);
- value32 = rtw_read32(padapter, EFUSE_TEST);
+ value32 = rtl8723au_read32(padapter, EFUSE_TEST);
bRet = true;
switch (bank) {
case 0:
pHalData = GET_HAL_DATA(padapter);
- value32 = rtw_read32(padapter, REG_SYS_CFG);
+ value32 = rtl8723au_read32(padapter, REG_SYS_CFG);
ChipVersion.ICType = CHIP_8723A;
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
ChipVersion.RFType = RF_TYPE_1T1R;
pHalData->RegulatorMode = ((value32 & SPS_SEL) ?
RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
- value32 = rtw_read32(padapter, REG_GPIO_OUTSTS);
+ value32 = rtl8723au_read32(padapter, REG_GPIO_OUTSTS);
/* ROM code version. */
ChipVersion.ROMVer = ((value32 & RF_RL_ID) >> 20);
/* For multi-function consideration. Added by Roger, 2010.10.06. */
pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
- value32 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL);
+ value32 = rtl8723au_read32(padapter, REG_MULTI_FUNC_CTRL);
pHalData->MultiFunc |=
((value32 & WL_FUNC_EN) ? RT_MULTI_FUNC_WIFI : 0);
pHalData->MultiFunc |= ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0);
addr = REG_BCN_CTRL;
- *pRegBcnCtrlVal = rtw_read8(padapter, addr);
+ *pRegBcnCtrlVal = rtl8723au_read8(padapter, addr);
*pRegBcnCtrlVal |= SetBits;
*pRegBcnCtrlVal &= ~ClearBits;
/* */
/* Reset TSF Timer to zero, added by Roger. 2008.06.24 */
/* */
- value32 = rtw_read32(padapter, REG_TCR);
+ value32 = rtl8723au_read32(padapter, REG_TCR);
value32 &= ~TSFRST;
rtw_write32(padapter, REG_TCR, value32);
if (enable) {
DBG_8723A("Enable notch filter\n");
rtw_write8(adapter, rOFDM0_RxDSP + 1,
- rtw_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1));
+ rtl8723au_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1));
} else {
DBG_8723A("Disable notch filter\n");
rtw_write8(adapter, rOFDM0_RxDSP + 1,
- rtw_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
+ rtl8723au_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
}
}
{
u8 val;
- val = rtw_read8(padapter, REG_LEDCFG2);
+ val = rtl8723au_read8(padapter, REG_LEDCFG2);
/* Let 8051 take control antenna settting */
val |= BIT(7); /* DPDT_SEL_EN, 0x4C[23] */
rtw_write8(padapter, REG_LEDCFG2, val);
{
u8 val;
- val = rtw_read8(padapter, REG_LEDCFG2);
+ val = rtl8723au_read8(padapter, REG_LEDCFG2);
/* Let 8051 take control antenna settting */
if (!(val & BIT(7))) {
val |= BIT(7); /* DPDT_SEL_EN, 0x4C[23] */
{
u8 val;
- val = rtw_read8(padapter, REG_LEDCFG2);
+ val = rtl8723au_read8(padapter, REG_LEDCFG2);
/* Let 8051 take control antenna settting */
val &= ~BIT(7); /* DPDT_SEL_EN, clear 0x4C[23] */
rtw_write8(padapter, REG_LEDCFG2, val);
u8 size = 0;
u32 cr;
- cr = rtw_read16(padapter, REG_9346CR);
+ cr = rtl8723au_read16(padapter, REG_9346CR);
/* 6: EEPROM used is 93C46, 4: boot from E-Fuse. */
size = (cr & BOOT_FROM_EEPROM) ? 6 : 4;
/* polling */
do {
- value = rtw_read32(padapter, LLTReg);
+ value = rtl8723au_read32(padapter, LLTReg);
if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) {
break;
}
/* 1. Disable GPIO[7:0] */
rtw_write16(padapter, REG_GPIO_PIN_CTRL + 2, 0x0000);
- value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF;
+ value32 = rtl8723au_read32(padapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF;
u4bTmp = value32 & 0x000000FF;
value32 |= ((u4bTmp << 8) | 0x00FF0000);
rtw_write32(padapter, REG_GPIO_PIN_CTRL, value32);
/* Configure all pins as input mode. */
rtw_write16(padapter, REG_GPIO_IO_SEL_2, 0x0000);
- value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL_2) & 0xFFFF001F;
+ value32 = rtl8723au_read32(padapter, REG_GPIO_PIN_CTRL_2) & 0xFFFF001F;
u4bTmp = value32 & 0x0000001F;
/* Set pin 8, 10, 11 and pin 12 to output mode. */
value32 |= ((u4bTmp << 8) | 0x001D0000);
u16 valu16 = 0;
rtw_write8(padapter, REG_MCUFWDL, 0);
- valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN);
+ valu16 = rtl8723au_read16(padapter, REG_SYS_FUNC_EN);
/* reset MCU , 8051 */
rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));
- valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN) & 0x0FFF;
+ valu16 = rtl8723au_read16(padapter, REG_SYS_FUNC_EN) & 0x0FFF;
rtw_write16(padapter, REG_SYS_FUNC_EN,
(valu16 | (FEN_HWPDN | FEN_ELDR))); /* reset MAC */
- valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN);
+ valu16 = rtl8723au_read16(padapter, REG_SYS_FUNC_EN);
/* enable MCU , 8051 */
rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));
} else {
S3/S4/S5/Disable, we can stop 8051 because */
/* we will init FW when power on again. */
/* If we want to SS mode, we can not reset 8051. */
- if (rtw_read8(padapter, REG_MCUFWDL) & BIT(1)) {
+ if (rtl8723au_read8(padapter, REG_MCUFWDL) & BIT(1)) {
/* IF fw in RAM code, do reset */
if (padapter->bFWReady) {
/* 2010/08/25 MH Accordign to RD alfred's
while ((retry_cnts++ < 100) &&
(FEN_CPUEN &
- rtw_read16(padapter, REG_SYS_FUNC_EN))) {
+ rtl8723au_read16(padapter,
+ REG_SYS_FUNC_EN))) {
udelay(50); /* us */
}
rtw_write8(padapter, REG_LDOA15_CTRL, 0x04);
/* rtw_write8(padapter, REG_LDOV12D_CTRL, 0x54); */
- value8 = rtw_read8(padapter, REG_LDOV12D_CTRL);
+ value8 = rtl8723au_read8(padapter, REG_LDOV12D_CTRL);
value8 &= (~LDV12_EN);
rtw_write8(padapter, REG_LDOV12D_CTRL, value8);
/* RT_TRACE(COMP_INIT, DBG_LOUD,
u32 tmpu4;
if (!AutoLoadFail) {
- tmpu4 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL);
+ tmpu4 = rtl8723au_read32(padapter, REG_MULTI_FUNC_CTRL);
if (tmpu4 & BT_FUNC_EN)
pHalData->EEPROMBluetoothCoexist = 1;
else
SetBcnCtrlReg23a(padapter, val8, ~val8);
}
- val8 = rtw_read8(padapter, MSR);
+ val8 = rtl8723au_read8(padapter, MSR);
val8 = (val8 & 0xC) | mode;
rtw_write8(padapter, MSR, val8);
}
((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
/* pHalData->RegTxPause |= STOP_BCNQ;BIT(6) */
/* rtw_write8(padapter, REG_TXPAUSE,
- (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); */
+ (rtl8723au_read8(Adapter, REG_TXPAUSE)|BIT(6))); */
StopTxBeacon(padapter);
}
/* enable to rx data frame.Accept all data frame */
/* rtw_write32(padapter, REG_RCR,
- rtw_read32(padapter, REG_RCR)|RCR_ADF); */
+ rtl8723au_read32(padapter, REG_RCR)|RCR_ADF); */
rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF);
- v32 = rtw_read32(padapter, REG_RCR);
+ v32 = rtl8723au_read32(padapter, REG_RCR);
v32 |= RCR_CBSSID_DATA | RCR_CBSSID_BCN;
rtw_write32(padapter, REG_RCR, v32);
#include <drv_types.h>
#include <rtl8723a_hal.h>
+#include <usb_ops_linux.h>
/*---------------------------Define Local Constant---------------------------*/
/* Channel switch:The size of command tables for switch channel*/
{
u32 ReturnValue = 0, OriginalValue, BitShift;
- OriginalValue = rtw_read32(Adapter, RegAddr);
+ OriginalValue = rtl8723au_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
ReturnValue = (OriginalValue & BitMask) >> BitShift;
return ReturnValue;
/* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */
if (BitMask != bMaskDWord) {/* if not "double word" write */
- OriginalValue = rtw_read32(Adapter, RegAddr);
+ OriginalValue = rtl8723au_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
}
/* Suggested by Scott. tynli_test. 2010.12.30. */
/* 1. 0x28[1] = 1 */
- TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL);
+ TmpU1B = rtl8723au_read8(Adapter, REG_AFE_PLL_CTRL);
udelay(2);
rtw_write8(Adapter, REG_AFE_PLL_CTRL, TmpU1B | BIT(1));
udelay(2);
udelay(2);
/* 3. 0x02[1:0] = 2b'11 */
- TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN);
+ TmpU1B = rtl8723au_read8(Adapter, REG_SYS_FUNC_EN);
rtw_write8(Adapter, REG_SYS_FUNC_EN,
(TmpU1B | FEN_BB_GLB_RSTn | FEN_BBRSTB));
/* 4. 0x25[6] = 0 */
- TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL + 1);
+ TmpU1B = rtl8723au_read8(Adapter, REG_AFE_XTAL_CTRL + 1);
rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, TmpU1B & ~BIT(6));
/* 5. 0x24[20] = 0 Advised by SD3 Alex Wang. 2011.02.09. */
- TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2);
+ TmpU1B = rtl8723au_read8(Adapter, REG_AFE_XTAL_CTRL+2);
rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, TmpU1B & ~BIT(4));
/* 6. 0x1f[7:0] = 0x07 */
/* 3<1>Set MAC register */
/* 3 */
- regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE);
- regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2);
+ regBwOpMode = rtl8723au_read8(Adapter, REG_BWOPMODE);
+ regRRSR_RSC = rtl8723au_read8(Adapter, REG_RRSR+2);
switch (pHalData->CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
#include <rtl8723a_sreset.h>
#include <rtl8723a_hal.h>
+#include <usb_ops_linux.h>
void rtl8723a_sreset_xmit_status_check(struct rtw_adapter *padapter)
{
unsigned int diff_time;
u32 txdma_status;
- txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
+ txdma_status = rtl8723au_read32(padapter, REG_TXDMA_STATUS);
if (txdma_status != 0) {
DBG_8723A("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
rtw_sreset_reset(padapter);
#include "drv_types.h"
#include "rtl8723a_hal.h"
#include "rtl8723a_led.h"
+#include "usb_ops_linux.h"
/* */
/* LED object. */
rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT(6));
break;
case LED_PIN_LED2:
- LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+ LedCfg = rtl8723au_read8(padapter, REG_LEDCFG2);
/* SW control led1 on. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT(5));
break;
rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT(5)|BIT(6));
break;
case LED_PIN_LED2:
- LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+ LedCfg = rtl8723au_read8(padapter, REG_LEDCFG2);
/* SW control led1 on. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT(3)|BIT(5));
break;
pHalData->OutEpNumber = 0;
/* Normal and High queue */
- value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 1));
+ value8 = rtl8723au_read8(pAdapter, (REG_NORMAL_SIE_EP + 1));
if (value8 & USB_NORMAL_SIE_EP_MASK) {
pHalData->OutEpQueueSel |= TX_SELE_HQ;
}
/* Low queue */
- value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 2));
+ value8 = rtl8723au_read8(pAdapter, (REG_NORMAL_SIE_EP + 2));
if (value8 & USB_NORMAL_SIE_EP_MASK) {
pHalData->OutEpQueueSel |= TX_SELE_LQ;
pHalData->OutEpNumber++;
return _FAIL;
/* 0x04[19] = 1, suggest by Jackie 2011.05.09, reset 8051 */
- value8 = rtw_read8(padapter, REG_APS_FSMCO+2);
+ value8 = rtl8723au_read8(padapter, REG_APS_FSMCO+2);
rtw_write8(padapter, REG_APS_FSMCO + 2, value8 | BIT(3));
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
/* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy.
Added by tynli. 2011.08.31. */
- value16 = rtw_read16(padapter, REG_CR);
+ value16 = rtl8723au_read16(padapter, REG_CR);
value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN |
PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN |
ENSEC | CALTMR_EN);
_InitNormalChipRegPriority(struct rtw_adapter *Adapter, u16 beQ, u16 bkQ,
u16 viQ, u16 voQ, u16 mgtQ, u16 hiQ)
{
- u16 value16 = rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7;
+ u16 value16 = rtl8723au_read16(Adapter, REG_TRXDMA_CTRL) & 0x7;
value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
_TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
{
u32 value32;
- value32 = rtw_read32(Adapter, REG_CR);
+ value32 = rtl8723au_read32(Adapter, REG_CR);
/* TODO: use the other function to set network type */
value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
/* rtw_write16(Adapter, REG_RXFLTMAP0, value16); */
/* enable RX_SHIFT bits */
- /* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter,
+ /* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtl8723au_read8(Adapter,
REG_TRXDMA_CTRL)|BIT(1)); */
}
u32 value32;
/* Response Rate Set */
- value32 = rtw_read32(Adapter, REG_RRSR);
+ value32 = rtl8723au_read32(Adapter, REG_RRSR);
value32 &= ~RATE_BITMAP_ALL;
value32 |= RATE_RRSR_CCK_ONLY_1M;
rtw_write32(Adapter, REG_RRSR, value32);
{
u8 value8;
- value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);
+ value8 = rtl8723au_read8(Adapter, REG_FWHW_TXQ_CTRL);
value8 |= EN_AMPDU_RTY_NEW;
rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
enum rt_rf_power_state rfpowerstate = rf_off;
if (pAdapter->pwrctrlpriv.bHWPowerdown) {
- val8 = rtw_read8(pAdapter, REG_HSISR);
+ val8 = rtl8723au_read8(pAdapter, REG_HSISR);
DBG_8723A("pwrdown, 0x5c(BIT7) =%02x\n", val8);
rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
} else { /* rf on/off */
rtw_write8(pAdapter, REG_MAC_PINMUX_CFG,
- rtw_read8(pAdapter, REG_MAC_PINMUX_CFG) & ~BIT(3));
- val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL);
+ rtl8723au_read8(pAdapter, REG_MAC_PINMUX_CFG) &
+ ~BIT(3));
+ val8 = rtl8723au_read8(pAdapter, REG_GPIO_IO_SEL);
DBG_8723A("GPIO_IN =%02x\n", val8);
rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
}
}
/* Check if MAC has already power on. by tynli. 2011.05.27. */
- val8 = rtw_read8(Adapter, REG_CR);
+ val8 = rtl8723au_read8(Adapter, REG_CR);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
("%s: REG_CR 0x100 = 0x%02x\n", __func__, val8));
/* Fix 92DU-VC S3 hang with the reason is that secondary mac is not
rtl8723a_set_nav_upper(Adapter, WiFiNavUpperUs);
/* 2011/03/09 MH debug only, UMC-B cut pass 2500 S5 test, but we need to fin root cause. */
- if (((rtw_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) != 0x83000000)) {
+ if (((rtl8723au_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) !=
+ 0x83000000)) {
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(24), 1);
RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: IQK fail recorver\n", __func__));
}
/* ack for xmit mgmt frames. */
- rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
+ rtw_write32(Adapter, REG_FWHW_TXQ_CTRL,
+ rtl8723au_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
exit:
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
/* 2. Force PWM, Enable SPS18_LDO_Marco_Block */
rtw_write8(Adapter, REG_SPS0_CTRL,
- rtw_read8(Adapter, REG_SPS0_CTRL) |
+ rtl8723au_read8(Adapter, REG_SPS0_CTRL) |
BIT(0) | BIT(3));
/* 3. restore BB, AFE control register. */
/* 2. Force PWM, Enable SPS18_LDO_Marco_Block */
rtw_write8(Adapter, REG_SPS0_CTRL,
- rtw_read8(Adapter, REG_SPS0_CTRL) |
+ rtl8723au_read8(Adapter, REG_SPS0_CTRL) |
BIT(0) | BIT(3));
/* 3. restore BB, AFE control register. */
}
/* 5. gated MAC Clock */
- bytetmp = rtw_read8(Adapter, REG_APSD_CTRL);
+ bytetmp = rtl8723au_read8(Adapter, REG_APSD_CTRL);
rtw_write8(Adapter, REG_APSD_CTRL, bytetmp & ~BIT(6));
mdelay(10);
break;
case rf_sleep:
case rf_off:
- value8 = rtw_read8(Adapter, REG_SPS0_CTRL) ;
+ value8 = rtl8723au_read8(Adapter, REG_SPS0_CTRL) ;
if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
value8 &= ~BIT(0);
else
rtw_write8(Adapter, REG_RF_CTRL, 0x00);
/* ==== Reset digital sequence ====== */
- if ((rtw_read8(Adapter, REG_MCUFWDL) & BIT(7)) &&
+ if ((rtl8723au_read8(Adapter, REG_MCUFWDL) & BIT(7)) &&
Adapter->bFWReady) /* 8051 RAM code */
rtl8723a_FirmwareSelfReset(Adapter);
/* Reset MCU. Suggested by Filen. 2011.01.26. by tynli. */
- u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+ u1bTmp = rtl8723au_read8(Adapter, REG_SYS_FUNC_EN+1);
rtw_write8(Adapter, REG_SYS_FUNC_EN+1, u1bTmp & ~BIT(2));
/* g. MCUFWDL 0x80[1:0]= 0 reset MCU ready status */
rtl8723AU_card_disable_flow);
/* Reset MCU IO Wrapper, added by Roger, 2011.08.30. */
- u1bTmp = rtw_read8(Adapter, REG_RSV_CTRL + 1);
+ u1bTmp = rtl8723au_read8(Adapter, REG_RSV_CTRL + 1);
rtw_write8(Adapter, REG_RSV_CTRL+1, u1bTmp & ~BIT(0));
- u1bTmp = rtw_read8(Adapter, REG_RSV_CTRL + 1);
+ u1bTmp = rtl8723au_read8(Adapter, REG_RSV_CTRL + 1);
rtw_write8(Adapter, REG_RSV_CTRL+1, u1bTmp | BIT(0));
/* 7. RSV_CTRL 0x1C[7:0] = 0x0E lock ISO/CLK/Power control register */
("usb_rx_init: usb_read_interrupt error\n"));
status = _FAIL;
}
- pHalData->IntrMask[0] = rtw_read32(Adapter, REG_USB_HIMR);
+ pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR);
MSG_8723A("pHalData->IntrMask = 0x%04x\n", pHalData->IntrMask[0]);
pHalData->IntrMask[0] |= UHIMR_C2HCMD|UHIMR_CPWM;
rtw_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
("\n ===> usb_rx_deinit\n"));
rtl8723a_usb_read_port_cancel(Adapter);
- pHalData->IntrMask[0] = rtw_read32(Adapter, REG_USB_HIMR);
+ pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR);
MSG_8723A("%s pHalData->IntrMask = 0x%04x\n", __func__,
pHalData->IntrMask[0]);
pHalData->IntrMask[0] = 0x0;
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
u8 eeValue;
- eeValue = rtw_read8(Adapter, REG_9346CR);
+ eeValue = rtl8723au_read8(Adapter, REG_9346CR);
/* To check system boot selection. */
pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false;
pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true;
{
u32 value32;
- value32 = rtw_read32(Adapter, EFUSE_TEST);
+ value32 = rtl8723au_read32(Adapter, EFUSE_TEST);
value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
rtw_write32(Adapter, EFUSE_TEST, value32);
}
return status;
}
-static u8 usb_read8(struct rtw_adapter *padapter, u32 addr)
+u8 rtl8723au_read8(struct rtw_adapter *padapter, u32 addr)
{
u8 request;
u8 requesttype;
return data;
}
-static u16 usb_read16(struct rtw_adapter *padapter, u32 addr)
+u16 rtl8723au_read16(struct rtw_adapter *padapter, u32 addr)
{
u8 request;
u8 requesttype;
return le16_to_cpu(data);
}
-static u32 usb_read32(struct rtw_adapter *padapter, u32 addr)
+u32 rtl8723au_read32(struct rtw_adapter *padapter, u32 addr)
{
u8 request;
u8 requesttype;
memset((u8 *)pops, 0, sizeof(struct _io_ops));
- pops->_read8 = &usb_read8;
- pops->_read16 = &usb_read16;
- pops->_read32 = &usb_read32;
-
pops->_write8 = &usb_write8;
pops->_write16 = &usb_write16;
pops->_write32 = &usb_write32;
struct _io_ops
{
- u8 (*_read8)(struct rtw_adapter *adapter, u32 addr);
- u16 (*_read16)(struct rtw_adapter *adapter, u32 addr);
- u32 (*_read32)(struct rtw_adapter *adapter, u32 addr);
-
int (*_write8)(struct rtw_adapter *adapter, u32 addr, u8 val);
int (*_write16)(struct rtw_adapter *adapter, u32 addr, u16 val);
int (*_write32)(struct rtw_adapter *adapter, u32 addr, u32 val);
void _rtw_attrib_read(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void _rtw_attrib_write(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-u8 _rtw_read823a(struct rtw_adapter *adapter, u32 addr);
-u16 _rtw_read1623a(struct rtw_adapter *adapter, u32 addr);
-u32 _rtw_read3223a(struct rtw_adapter *adapter, u32 addr);
void _rtw_read_port23a_cancel(struct rtw_adapter *adapter);
int _rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val);
bool match_read_sniff_ranges(u16 addr, u16 len);
bool match_write_sniff_ranges(u16 addr, u16 len);
-u8 dbg_rtw_read823a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
-u16 dbg_rtw_read1623a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
-u32 dbg_rtw_read3223a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
-
int dbg_rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val, const char *caller, const int line);
int dbg_rtw_write1623a(struct rtw_adapter *adapter, u32 addr, u16 val, const char *caller, const int line);
int dbg_rtw_write3223a(struct rtw_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
int dbg_rtw_writeN23a(struct rtw_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line);
-#define rtw_read8(adapter, addr) dbg_rtw_read823a((adapter), (addr), __FUNCTION__, __LINE__)
-#define rtw_read16(adapter, addr) dbg_rtw_read1623a((adapter), (addr), __FUNCTION__, __LINE__)
-#define rtw_read32(adapter, addr) dbg_rtw_read3223a((adapter), (addr), __FUNCTION__, __LINE__)
-
#define rtw_write8(adapter, addr, val) dbg_rtw_write823a((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_write16(adapter, addr, val) dbg_rtw_write1623a((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_write32(adapter, addr, val) dbg_rtw_write3223a((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN23a((adapter), (addr), (length), (data), __FUNCTION__, __LINE__)
#else /* DBG_IO */
-#define rtw_read8(adapter, addr) _rtw_read823a((adapter), (addr))
-#define rtw_read16(adapter, addr) _rtw_read1623a((adapter), (addr))
-#define rtw_read32(adapter, addr) _rtw_read3223a((adapter), (addr))
-
#define rtw_write8(adapter, addr, val) _rtw_write823a((adapter), (addr), (val))
#define rtw_write16(adapter, addr, val) _rtw_write1623a((adapter), (addr), (val))
#define rtw_write32(adapter, addr, val) _rtw_write3223a((adapter), (addr), (val))
#define PlatformEFIOWrite4Byte(_a,_b,_c) \
rtw_write32(_a,_b,_c)
-#define PlatformEFIORead1Byte(_a,_b) \
- rtw_read8(_a,_b)
-#define PlatformEFIORead2Byte(_a,_b) \
- rtw_read16(_a,_b)
-#define PlatformEFIORead4Byte(_a,_b) \
- rtw_read32(_a,_b)
+#define PlatformEFIORead1Byte(_a,_b) rtl8723au_read8(_a,_b)
+#define PlatformEFIORead2Byte(_a,_b) rtl8723au_read16(_a,_b)
+#define PlatformEFIORead4Byte(_a,_b) rtl8723au_read32(_a,_b)
#endif /* _RTL8711_IO_H_ */
void rtl8723a_usb_write_port_cancel(struct rtw_adapter *padapter);
int rtl8723a_usb_read_interrupt(struct rtw_adapter *adapter, u32 addr);
+u8 rtl8723au_read8(struct rtw_adapter *padapter, u32 addr);
+u16 rtl8723au_read16(struct rtw_adapter *padapter, u32 addr);
+u32 rtl8723au_read32(struct rtw_adapter *padapter, u32 addr);
+
#endif
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