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drm/amdgpu: rename num_doorbells
authorShashank Sharma <shashank.sharma@amd.com>
Fri, 24 Feb 2023 10:25:07 +0000 (11:25 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 13 Apr 2023 04:19:42 +0000 (00:19 -0400)
Rename doorbell.num_doorbells to doorbell.num_kernel_doorbells to
make it more readable.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Acked-by: Christian Koenig <christian.koenig@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h

index f99d487..0385f7f 100644 (file)
@@ -96,7 +96,7 @@ static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
                                         size_t *start_offset)
 {
        /*
-        * The first num_doorbells are used by amdgpu.
+        * The first num_kernel_doorbells are used by amdgpu.
         * amdkfd takes whatever's left in the aperture.
         */
        if (adev->enable_mes) {
@@ -109,11 +109,11 @@ static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
                *aperture_base = adev->doorbell.base;
                *aperture_size = 0;
                *start_offset = 0;
-       } else if (adev->doorbell.size > adev->doorbell.num_doorbells *
+       } else if (adev->doorbell.size > adev->doorbell.num_kernel_doorbells *
                                                sizeof(u32)) {
                *aperture_base = adev->doorbell.base;
                *aperture_size = adev->doorbell.size;
-               *start_offset = adev->doorbell.num_doorbells * sizeof(u32);
+               *start_offset = adev->doorbell.num_kernel_doorbells * sizeof(u32);
        } else {
                *aperture_base = 0;
                *aperture_size = 0;
index efdc6b7..97068c4 100644 (file)
@@ -602,7 +602,7 @@ u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index)
        if (amdgpu_device_skip_hw_access(adev))
                return 0;
 
-       if (index < adev->doorbell.num_doorbells) {
+       if (index < adev->doorbell.num_kernel_doorbells) {
                return readl(adev->doorbell.ptr + index);
        } else {
                DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
@@ -625,7 +625,7 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v)
        if (amdgpu_device_skip_hw_access(adev))
                return;
 
-       if (index < adev->doorbell.num_doorbells) {
+       if (index < adev->doorbell.num_kernel_doorbells) {
                writel(v, adev->doorbell.ptr + index);
        } else {
                DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
@@ -646,7 +646,7 @@ u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
        if (amdgpu_device_skip_hw_access(adev))
                return 0;
 
-       if (index < adev->doorbell.num_doorbells) {
+       if (index < adev->doorbell.num_kernel_doorbells) {
                return atomic64_read((atomic64_t *)(adev->doorbell.ptr + index));
        } else {
                DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
@@ -669,7 +669,7 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
        if (amdgpu_device_skip_hw_access(adev))
                return;
 
-       if (index < adev->doorbell.num_doorbells) {
+       if (index < adev->doorbell.num_kernel_doorbells) {
                atomic64_set((atomic64_t *)(adev->doorbell.ptr + index), v);
        } else {
                DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
@@ -1060,7 +1060,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
        if (adev->asic_type < CHIP_BONAIRE) {
                adev->doorbell.base = 0;
                adev->doorbell.size = 0;
-               adev->doorbell.num_doorbells = 0;
+               adev->doorbell.num_kernel_doorbells = 0;
                adev->doorbell.ptr = NULL;
                return 0;
        }
@@ -1075,27 +1075,27 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
        adev->doorbell.size = pci_resource_len(adev->pdev, 2);
 
        if (adev->enable_mes) {
-               adev->doorbell.num_doorbells =
+               adev->doorbell.num_kernel_doorbells =
                        adev->doorbell.size / sizeof(u32);
        } else {
-               adev->doorbell.num_doorbells =
+               adev->doorbell.num_kernel_doorbells =
                        min_t(u32, adev->doorbell.size / sizeof(u32),
                              adev->doorbell_index.max_assignment+1);
-               if (adev->doorbell.num_doorbells == 0)
+               if (adev->doorbell.num_kernel_doorbells == 0)
                        return -EINVAL;
 
                /* For Vega, reserve and map two pages on doorbell BAR since SDMA
                 * paging queue doorbell use the second page. The
                 * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the
                 * doorbells are in the first page. So with paging queue enabled,
-                * the max num_doorbells should + 1 page (0x400 in dword)
+                * the max num_kernel_doorbells should + 1 page (0x400 in dword)
                 */
                if (adev->asic_type >= CHIP_VEGA10)
-                       adev->doorbell.num_doorbells += 0x400;
+                       adev->doorbell.num_kernel_doorbells += 0x400;
        }
 
        adev->doorbell.ptr = ioremap(adev->doorbell.base,
-                                    adev->doorbell.num_doorbells *
+                                    adev->doorbell.num_kernel_doorbells *
                                     sizeof(u32));
        if (adev->doorbell.ptr == NULL)
                return -ENOMEM;
index 7199b6b..1226398 100644 (file)
@@ -29,7 +29,9 @@ struct amdgpu_doorbell {
        resource_size_t         base;
        resource_size_t         size;
        u32 __iomem             *ptr;
-       u32                     num_doorbells;  /* Number of doorbells actually reserved for amdgpu. */
+
+       /* Number of doorbells reserved for amdgpu kernel driver */
+       u32 num_kernel_doorbells;
 };
 
 /* Reserved doorbells for amdgpu (including multimedia).