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mmc: sdhci: move FSL ESDHC reset handling quirk into esdhc code
authorRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 25 Apr 2014 11:57:18 +0000 (12:57 +0100)
committerChris Ball <chris@printf.net>
Thu, 22 May 2014 11:26:28 +0000 (07:26 -0400)
The Freescale esdhc driver is the only driver which needs the interrupt
registers restored after a reset.  Move this quirk to be part of the
ESDHC driver implementation.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
drivers/mmc/host/sdhci-esdhc-imx.c
drivers/mmc/host/sdhci-esdhc.h
drivers/mmc/host/sdhci.c
include/linux/mmc/sdhci.h

index b1d74fa..812c577 100644 (file)
@@ -876,6 +876,14 @@ static int esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
        return esdhc_change_pinstate(host, uhs);
 }
 
+static void esdhc_reset(struct sdhci_host *host, u8 mask)
+{
+       sdhci_reset(host, mask);
+
+       sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
+       sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
+}
+
 static struct sdhci_ops sdhci_esdhc_ops = {
        .read_l = esdhc_readl_le,
        .read_w = esdhc_readw_le,
@@ -888,7 +896,7 @@ static struct sdhci_ops sdhci_esdhc_ops = {
        .get_ro = esdhc_pltfm_get_ro,
        .set_bus_width = esdhc_pltfm_set_bus_width,
        .set_uhs_signaling = esdhc_set_uhs_signaling,
-       .reset = sdhci_reset,
+       .reset = esdhc_reset,
 };
 
 static const struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
index a7d9f95..de69bdd 100644 (file)
@@ -22,8 +22,7 @@
                                SDHCI_QUIRK_NO_BUSY_IRQ | \
                                SDHCI_QUIRK_NONSTANDARD_CLOCK | \
                                SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
-                               SDHCI_QUIRK_PIO_NEEDS_DELAY | \
-                               SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
+                               SDHCI_QUIRK_PIO_NEEDS_DELAY)
 
 #define ESDHC_SYSTEM_CONTROL   0x2c
 #define ESDHC_CLOCK_MASK       0x0000fff0
index 5e25147..074157e 100644 (file)
@@ -203,11 +203,6 @@ static void sdhci_do_reset(struct sdhci_host *host, u8 mask)
 
        host->ops->reset(host, mask);
 
-       if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) {
-               sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
-               sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
-       }
-
        if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) {
                if ((host->ops->enable_dma) && (mask & SDHCI_RESET_ALL))
                        host->ops->enable_dma(host);
index 9361d8e..02919ef 100644 (file)
@@ -61,8 +61,6 @@ struct sdhci_host {
 #define SDHCI_QUIRK_NONSTANDARD_CLOCK                  (1<<17)
 /* Controller does not like fast PIO transfers */
 #define SDHCI_QUIRK_PIO_NEEDS_DELAY                    (1<<18)
-/* Controller losing signal/interrupt enable states after reset */
-#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET           (1<<19)
 /* Controller has to be forced to use block size of 2048 bytes */
 #define SDHCI_QUIRK_FORCE_BLK_SZ_2048                  (1<<20)
 /* Controller cannot do multi-block transfers */