drm/i915/tgl: Implement Wa_1806527549

This will whitelist the HIZ_CHICKEN register so mesa can disable the
optimizations and avoid hang when using D16_UNORM.

v2: moved to the right place and used the right function() (Chris)

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200227220101.321671-2-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index d402b8e..5d85b75 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1259,6 +1259,9 @@ static void tgl_whitelist_build(struct intel_engine_cs *engine)
 
                /* Wa_1808121037:tgl */
                whitelist_reg(w, GEN7_COMMON_SLICE_CHICKEN1);
+
+               /* Wa_1806527549:tgl */
+               whitelist_reg(w, HIZ_CHICKEN);
                break;
        default:
                break;