Assorted fixes to pinsrw, pextrw, pmovmskb, movmskp, maskmovq.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index caccc80..863713a 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2001-05-04  Alan Modra  <amodra@one.net.au>
+
+       * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
+       and pextrw to swap reg/rm assignments.
+
 2001-04-05  Hans-Peter Nilsson  <hp@axis.com>
 
        * cris.h (enum cris_insn_version_usage): Correct comment for

diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index 9deffcc..3609748 100644 (file)
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -1152,8 +1152,8 @@ static const template i386_optab[] = {
 {"pavgb",     2, 0x660fe0,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
 {"pavgw",     2, 0x0fe3,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
 {"pavgw",     2, 0x660fe3,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
-{"pextrw",    3, 0x0fc5,    X, CpuSSE, FP|Modrm,       { Imm8, RegMMX, Reg32|InvMem } },
-{"pextrw",    3, 0x660fc5,  X, CpuSSE2,FP|Modrm,       { Imm8, RegXMM, Reg32|InvMem } },
+{"pextrw",    3, 0x0fc5,    X, CpuSSE, FP|Modrm,       { Imm8, RegMMX|InvMem, Reg32 } },
+{"pextrw",    3, 0x660fc5,  X, CpuSSE2,FP|Modrm,       { Imm8, RegXMM|InvMem, Reg32 } },
 {"pinsrw",    3, 0x0fc4,    X, CpuSSE, FP|Modrm,       { Imm8, Reg32|ShortMem, RegMMX } },
 {"pinsrw",    3, 0x660fc4,  X, CpuSSE2, FP|Modrm,      { Imm8, Reg32|ShortMem, RegXMM } },
 {"pmaxsw",    2, 0x0fee,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
@@ -1164,8 +1164,8 @@ static const template i386_optab[] = {
 {"pminsw",    2, 0x660fea,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
 {"pminub",    2, 0x0fda,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
 {"pminub",    2, 0x660fda,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
-{"pmovmskb",  2, 0x0fd7,    X, CpuSSE, FP|Modrm,       { RegMMX, Reg32|InvMem, 0 } },
-{"pmovmskb",  2, 0x660fd7,  X, CpuSSE2,FP|Modrm,       { RegXMM, Reg32|InvMem, 0 } },
+{"pmovmskb",  2, 0x0fd7,    X, CpuSSE, FP|Modrm,       { RegMMX|InvMem, Reg32, 0 } },
+{"pmovmskb",  2, 0x660fd7,  X, CpuSSE2,FP|Modrm,       { RegXMM|InvMem, Reg32, 0 } },
 {"pmulhuw",   2, 0x0fe4,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
 {"pmulhuw",   2, 0x660fe4,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
 {"prefetchnta", 1, 0x0f18,  0, CpuSSE, FP|Modrm,       { LLongMem, 0, 0 } },

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b4e1d70..1a483c7 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,14 @@
+2001-05-04  Alan Modra  <amodra@one.net.au>
+
+       * i386-dis.c (Ev, Ed): Remove duplicate define.
+       (Gd): Define.
+       (XS): Define.
+       (OP_XS): New function.
+       (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and
+       movmskp operands.
+       (dis386_twobyte_intel): Likewise.
+       (prefix_user_table): Use MS for maskmovq operand.
+
 2001-04-27  Johan Rydberg  <jrydberg@opencores.org>
 
         * Makefile.am: Add OpenRISC target.

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index ff4246b..005a12c 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -149,15 +149,14 @@ fetch_data (info, addr)
 #define Ev OP_E, v_mode
 #define Ed OP_E, d_mode
 #define indirEb OP_indirE, b_mode
-#define Gb OP_G, b_mode
-#define Ev OP_E, v_mode
-#define Ed OP_E, d_mode
 #define indirEv OP_indirE, v_mode
 #define Ew OP_E, w_mode
 #define Ma OP_E, v_mode
 #define M OP_E, 0              /* lea */
 #define Mp OP_E, 0             /* 32 or 48 bit memory operand for LDS, LES etc */
+#define Gb OP_G, b_mode
 #define Gv OP_G, v_mode
+#define Gd OP_G, d_mode
 #define Gw OP_G, w_mode
 #define Rd OP_Rd, d_mode
 #define Rm OP_Rd, m_mode
@@ -246,6 +245,7 @@ fetch_data (info, addr)
 #define EM OP_EM, v_mode
 #define EX OP_EX, v_mode
 #define MS OP_MS, v_mode
+#define XS OP_XS, v_mode
 #define None OP_E, 0
 #define OPSUF OP_3DNowSuffix, 0
 #define OPSIMD OP_SIMD_Suffix, 0
@@ -287,6 +287,7 @@ static void OP_XMM PARAMS ((int, int));
 static void OP_EM PARAMS ((int, int));
 static void OP_EX PARAMS ((int, int));
 static void OP_MS PARAMS ((int, int));
+static void OP_XS PARAMS ((int, int));
 static void OP_3DNowSuffix PARAMS ((int, int));
 static void OP_SIMD_Suffix PARAMS ((int, int));
 static void SIMD_Fixup PARAMS ((int, int));
@@ -1708,7 +1709,7 @@ static const struct dis386 dis386_twobyte_att[] = {
   { "cmovle", Gv, Ev, XX },
   { "cmovg", Gv, Ev, XX },
   /* 50 */
-  { "movmskpX", Gv, EX, XX },
+  { "movmskpX", Gd, XS, XX },
   { PREGRP13 },
   { PREGRP12 },
   { PREGRP11 },
@@ -1838,8 +1839,8 @@ static const struct dis386 dis386_twobyte_att[] = {
   { "xaddS", Ev, Gv, XX },
   { PREGRP1 },
   { "movntiS", Ev, Gv, XX },
-  { "pinsrw", MX, Ev, Ib },
-  { "pextrw", Ev, MX, Ib },
+  { "pinsrw", MX, Ed, Ib },
+  { "pextrw", Gd, MS, Ib },
   { "shufpX", XM, EX, Ib },
   { GRP9 },
   /* c8 */
@@ -1859,7 +1860,7 @@ static const struct dis386 dis386_twobyte_att[] = {
   { "paddq", MX, EM, XX },
   { "pmullw", MX, EM, XX },
   { PREGRP21 },
-  { "pmovmskb", Ev, MX, XX },
+  { "pmovmskb", Gd, MS, XX },
   /* d8 */
   { "psubusb", MX, EM, XX },
   { "psubusw", MX, EM, XX },
@@ -2000,7 +2001,7 @@ static const struct dis386 dis386_twobyte_intel[] = {
   { "cmovle", Gv, Ev, XX },
   { "cmovg", Gv, Ev, XX },
   /* 50 */
-  { "movmskpX", Gv, EX, XX },
+  { "movmskpX", Gd, XS, XX },
   { PREGRP13 },
   { PREGRP12 },
   { PREGRP11 },
@@ -2130,8 +2131,8 @@ static const struct dis386 dis386_twobyte_intel[] = {
   { "xadd", Ev, Gv, XX },
   { PREGRP1 },
   { "movnti", Ev, Gv, XX },
-  { "pinsrw", MX, Ev, Ib },
-  { "pextrw", Ev, MX, Ib },
+  { "pinsrw", MX, Ed, Ib },
+  { "pextrw", Gd, MS, Ib },
   { "shufpX", XM, EX, Ib },
   { GRP9 },
   /* c8 */
@@ -2151,7 +2152,7 @@ static const struct dis386 dis386_twobyte_intel[] = {
   { "paddq", MX, EM, XX },
   { "pmullw", MX, EM, XX },
   { PREGRP21 },
-  { "pmovmskb", Ev, MX, XX },
+  { "pmovmskb", Gd, MS, XX },
   /* d8 */
   { "psubusb", MX, EM, XX },
   { "psubusw", MX, EM, XX },
@@ -2693,7 +2694,7 @@ static const struct dis386 prefix_user_table[][4] = {
   },
   /* PREGRP18 */
   {
-    { "maskmovq", MX, EM, XX },
+    { "maskmovq", MX, MS, XX },
     { "(bad)", XM, EX, XX },
     { "maskmovdqu", XM, EX, XX },
     { "(bad)", XM, EX, XX },
@@ -3170,7 +3171,6 @@ print_insn_i386 (pc, info)
                        used_prefixes |= (prefixes & PREFIX_REPNZ);
                        if (prefixes & PREFIX_REPNZ)
                          index = 3;
-
                      }
                  }
                dp = &prefix_user_table[dp->bytemode1][index];
@@ -4967,6 +4967,17 @@ OP_MS (bytemode, sizeflag)
     BadOp();
 }
 
+static void
+OP_XS (bytemode, sizeflag)
+     int bytemode;
+     int sizeflag;
+{
+  if (mod == 3)
+    OP_EX (bytemode, sizeflag);
+  else
+    BadOp();
+}
+
 static const char *Suffix3DNow[] = {
 /* 00 */       NULL,           NULL,           NULL,           NULL,
 /* 04 */       NULL,           NULL,           NULL,           NULL,