Geetha sowjanya says:
====================
Macsec fixes for CN10KB
This patch set has fixes for the issues encountered while
testing macsec on CN10KB silicon. Below is the description
of patches:
Patch 1: For each LMAC two MCSX_MCS_TOP_SLAVE_CHANNEL_CFG registers exist
in CN10KB. Bypass has to be disabled in two registers.
Patch 2: Add workaround for errata w.r.t accessing TCAM DATA and MASK registers.
Patch 3: Fixes the parser configuration to allow PTP traffic.
Patch 4: Addresses the IP vector and block level interrupt mask changes.
Patch 5: Fix NULL pointer crashes when rebooting
Patch 6: Since MCS is global block shared by all LMACS the TCAM match
must include macsec DMAC also to distinguish each macsec interface
Patch 7: Before freeing MCS hardware resource to AF clear the stats also.
Patch 8: Stats which share single counter in hardware are tracked in software.
This tracking was based on wrong secy mode params.
Use correct secy mode params
Patch 9: When updating secy mode params, PN number was also reset to
initial values. Hence do not write to PN value register when
updating secy.
====================
Link: https://lore.kernel.org/r/20230426062528.20575-1-gakula@marvell.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>