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accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 23 Feb 2023 09:05:01 +0000 (23:05 -1000)
committerRichard Henderson <richard.henderson@linaro.org>
Sun, 5 Mar 2023 21:44:07 +0000 (13:44 -0800)
Using an atomic write or read-write insn on ROM is basically
a happens-never case.  Handle it via stop-the-world, which
will generate non-atomic serial code, where we can correctly
ignore the write while producing the correct read result.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
accel/tcg/cputlb.c

index deafcc7..b49fb0d 100644 (file)
@@ -1831,7 +1831,7 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
     }
 
     /* Notice an IO access or a needs-MMU-lookup access */
-    if (unlikely(tlb_addr & TLB_MMIO)) {
+    if (unlikely(tlb_addr & (TLB_MMIO | TLB_DISCARD_WRITE))) {
         /* There's really nothing that can be done to
            support this apart from stop-the-world.  */
         goto stop_the_world;