drm/amd/display: Remove unnecessary wait mpcc idle.

Before power gate plane, mpcc idle wait is processed,
no need to wait another time.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index d1488d5..18fc5e7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1178,12 +1178,6 @@ static void commit_planes_for_stream(struct dc *dc,
        if (update_type == UPDATE_TYPE_FULL) {
                dc->hwss.set_bandwidth(dc, context, false);
                context_clock_trace(dc, context);
-
-               for (j = 0; j < dc->res_pool->pipe_count; j++) {
-                       struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
-
-                       dc->hwss.wait_for_mpcc_disconnect(dc, dc->res_pool, pipe_ctx);
-               }
        }
 
        if (surface_count == 0) {