drm/i915: move clearing of RPS interrupt bits from disable to reset time

The logical place for clearing the RPS latched interrupt bits is when
resetting the RPS interrupts, so move the corresponding part from the RPS
disable function to the reset function. During resetting we already
cleared the IIR bits, so the only thing missing there was clearing pm_iir.

Note that we call gen6_disable_rps_interrupts() also during driver load
and resume time via intel_uncore_sanitize() when i915 interrupts are
still not installed. If there are any pending RPS bits at this point
(which after this patch wouldn't be cleared) they will be cleared by the
reset code via the interrupt preinstall hooks.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7afbde4..14ecb4d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -277,6 +277,7 @@ void gen6_reset_rps_interrupts(struct drm_device *dev)
        I915_WRITE(reg, dev_priv->pm_rps_events);
        I915_WRITE(reg, dev_priv->pm_rps_events);
        POSTING_READ(reg);
+       dev_priv->rps.pm_iir = 0;
        spin_unlock_irq(&dev_priv->irq_lock);
 }
 
@@ -334,15 +335,6 @@ void gen6_disable_rps_interrupts(struct drm_device *dev)
        spin_unlock_irq(&dev_priv->irq_lock);
 
        synchronize_irq(dev->irq);
-
-       spin_lock_irq(&dev_priv->irq_lock);
-
-       I915_WRITE(gen6_pm_iir(dev_priv), dev_priv->pm_rps_events);
-       I915_WRITE(gen6_pm_iir(dev_priv), dev_priv->pm_rps_events);
-
-       dev_priv->rps.pm_iir = 0;
-
-       spin_unlock_irq(&dev_priv->irq_lock);
 }
 
 /**