modified input data latch to stop using latch, but use dff.

diff --git a/simulation/cpu/cpu_registers.vhd b/simulation/cpu/cpu_registers.vhd
index 6655549..c8e761b 100644 (file)
--- a/simulation/cpu/cpu_registers.vhd
+++ b/simulation/cpu/cpu_registers.vhd
@@ -159,12 +159,15 @@ end input_data_latch;
 
 architecture rtl of input_data_latch is
 
-component data_latch
+component d_flip_flop
     generic (
             dsize : integer := 8
             );
     port (  
             clk     : in std_logic;
+            res_n   : in std_logic;
+            set_n   : in std_logic;
+            we_n    : in std_logic;
             d       : in std_logic_vector (dsize - 1 downto 0);
             q       : out std_logic_vector (dsize - 1 downto 0)
         );
@@ -181,13 +184,11 @@ component tri_state_buffer
         );
 end component;
 
-signal latch_clk : std_logic;
 signal latch_buf : std_logic_vector (dsize - 1 downto 0);
 
 begin
-    latch_clk <= (not we_n) and clk;
-    latch_inst : data_latch generic map (dsize) 
-                    port map(latch_clk, int_dbus, latch_buf);
+    latch_inst : d_flip_flop generic map (dsize) 
+                    port map(clk, '1', '1', we_n, int_dbus, latch_buf);
     iput_data_tsb : tri_state_buffer generic map (dsize) 
                     port map(oe_n, latch_buf, alu_bus);
 

diff --git a/simulation/cpu/mos6502.vhd b/simulation/cpu/mos6502.vhd
index 52c3115..d40d8e7 100644 (file)
--- a/simulation/cpu/mos6502.vhd
+++ b/simulation/cpu/mos6502.vhd
@@ -446,9 +446,9 @@ begin
 
     --address operand data buffer.
     idl_l : input_data_latch generic map (dsize) 
-            port map(set_clk, dl_al_oe_n, dl_al_we_n, int_d_bus, bal);
+            port map(trigger_clk, dl_al_oe_n, dl_al_we_n, int_d_bus, bal);
     idl_h : input_data_latch generic map (dsize) 
-            port map(set_clk, '0', dl_ah_we_n, int_d_bus, idl_h_out);
+            port map(trigger_clk, '0', dl_ah_we_n, int_d_bus, idl_h_out);
     ---only DLH has b-bus side output.
     idl_h_a_buf : tri_state_buffer generic map (dsize)
             port map (dl_ah_oe_n, idl_h_out, bah);

diff --git a/tools/test-image/sample1.asm b/tools/test-image/sample1.asm
index 2cc3734..68ed6ae 100644 (file)
--- a/tools/test-image/sample1.asm
+++ b/tools/test-image/sample1.asm
@@ -15,18 +15,18 @@
 .proc  Reset\r
 \r
 ;;; de1 env decoder bug test\r
-LDA   $8182, y\r
-STA   $2007\r
-INY   \r
-DEX   \r
-;;BPL   #-10\r
-LDA   $8182, y\r
-STA   $2007\r
-INY   \r
-DEX   \r
-;;BPL   #-10\r
-LDA   #$3d\r
-STA   $0302               ;;;>>>invalid store address!!!! @ 907,921,200 ps\r
+;;;LDA   $8182, y\r
+;;;STA   $2007\r
+;;;INY   \r
+;;;DEX   \r
+;;;;;BPL   #-10\r
+;;;LDA   $8182, y\r
+;;;STA   $2007\r
+;;;INY   \r
+;;;DEX   \r
+;;;;;BPL   #-10\r
+;;;LDA   #$3d\r
+;;;STA   $0302               ;;;>>>invalid store address!!!! @ 907,921,200 ps\r
 \r
 \r
 \r