OSDN Git Service
(root)
/
tomoyo
/
tomoyo-test1.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
ecf71fb
)
perf/x86/msr: Add Tremont support
author
Kan Liang
<kan.liang@linux.intel.com>
Tue, 28 Jan 2020 18:31:19 +0000
(10:31 -0800)
committer
Ingo Molnar
<mingo@kernel.org>
Tue, 11 Feb 2020 12:17:50 +0000
(13:17 +0100)
Tremont is Intel's successor to Goldmont Plus. SMI_COUNT MSR is also
supported.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link:
https://lkml.kernel.org/r/1580236279-35492-3-git-send-email-kan.liang@linux.intel.com
arch/x86/events/msr.c
patch
|
blob
|
history
diff --git
a/arch/x86/events/msr.c
b/arch/x86/events/msr.c
index
6f86650
..
a949f6f
100644
(file)
--- a/
arch/x86/events/msr.c
+++ b/
arch/x86/events/msr.c
@@
-75,8
+75,9
@@
static bool test_intel(int idx, void *data)
case INTEL_FAM6_ATOM_GOLDMONT:
case INTEL_FAM6_ATOM_GOLDMONT_D:
-
case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
+ case INTEL_FAM6_ATOM_TREMONT_D:
+ case INTEL_FAM6_ATOM_TREMONT:
case INTEL_FAM6_XEON_PHI_KNL:
case INTEL_FAM6_XEON_PHI_KNM: