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Yet another fix llvm-objdump so it picks a good CPU based for Mach-O files,
authorKevin Enderby <enderby@apple.com>
Fri, 10 Feb 2017 19:27:10 +0000 (19:27 +0000)
committerKevin Enderby <enderby@apple.com>
Fri, 10 Feb 2017 19:27:10 +0000 (19:27 +0000)
in this case for CPU_SUBTYPE_ARM64_ALL.

For this cpusubtype it should default to a cyclone CPU
to give proper disassembly without a -mcpu= flag.

rdar://27767188

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294771 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Object/MachOObjectFile.cpp
test/tools/llvm-objdump/AArch64/Inputs/print-armv8crypto.obj.macho-aarch64 [new file with mode: 0644]
test/tools/llvm-objdump/AArch64/mach-print-armv8crypto.test [new file with mode: 0644]
test/tools/llvm-objdump/AArch64/macho-print-mrs.test

index c6ce5b0..9289983 100644 (file)
@@ -2477,6 +2477,8 @@ Triple MachOObjectFile::getArchTriple(uint32_t CPUType, uint32_t CPUSubType,
   case MachO::CPU_TYPE_ARM64:
     switch (CPUSubType & ~MachO::CPU_SUBTYPE_MASK) {
     case MachO::CPU_SUBTYPE_ARM64_ALL:
+      if (McpuDefault)
+        *McpuDefault = "cyclone";
       if (ArchFlag)
         *ArchFlag = "arm64";
       return Triple("arm64-apple-darwin");
diff --git a/test/tools/llvm-objdump/AArch64/Inputs/print-armv8crypto.obj.macho-aarch64 b/test/tools/llvm-objdump/AArch64/Inputs/print-armv8crypto.obj.macho-aarch64
new file mode 100644 (file)
index 0000000..b6ea824
Binary files /dev/null and b/test/tools/llvm-objdump/AArch64/Inputs/print-armv8crypto.obj.macho-aarch64 differ
diff --git a/test/tools/llvm-objdump/AArch64/mach-print-armv8crypto.test b/test/tools/llvm-objdump/AArch64/mach-print-armv8crypto.test
new file mode 100644 (file)
index 0000000..e5ac0cb
--- /dev/null
@@ -0,0 +1,3 @@
+RUN: llvm-objdump -d -m -no-show-raw-insn %p/Inputs/print-armv8crypto.obj.macho-aarch64 | FileCheck %s
+
+CHECK: 0:      sha1su0.4s      v0, v1, v2
index cc1d14f..c629a4d 100644 (file)
@@ -1,3 +1,3 @@
 RUN: llvm-objdump -d -m -no-show-raw-insn %p/Inputs/print-mrs.obj.macho-aarch64 | FileCheck %s
 
-CHECK: 0:  mrs x0, S3_7_C15_C2_0
+CHECK: 0:  mrs x0, CPM_IOACC_CTL_EL3