add support for fstcw, PR8259

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115154 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 3ecf273..e028d41 100644 (file)
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1119,13 +1119,19 @@ MatchAndEmitInstruction(SMLoc IDLoc,
 
   // First, handle aliases that expand to multiple instructions.
   // FIXME: This should be replaced with a real .td file alias mechanism.
-  if (Op->getToken() == "fstsw") {
+  if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw") {
     MCInst Inst;
     Inst.setOpcode(X86::WAIT);
     Out.EmitInstruction(Inst);
 
     delete Operands[0];
-    Operands[0] = X86Operand::CreateToken("fnstsw", IDLoc);
+    const char *Repl =
+      StringSwitch<const char*>(Op->getToken())
+        .Case("fstsw", "fnstsw")
+        .Case("fstcw", "fnstcw")
+        .Default(0);
+    assert(Repl && "Unknown wait-prefixed instruction");
+    Operands[0] = X86Operand::CreateToken(Repl, IDLoc);
   }
   
   

diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s
index 6da4468..b2ac5ad 100644 (file)
--- a/test/MC/AsmParser/X86/x86_instructions.s
+++ b/test/MC/AsmParser/X86/x86_instructions.s
@@ -416,6 +416,11 @@ fstsw (%rax)
 // CHECK: wait
 // CHECK: fnstsw (%rax)
 
+// PR8259
+fstcw (%rsp)
+// CHECK: wait
+// CHECK: fnstcw (%rsp)
+
 
 // rdar://8456382 - cvtsd2si support.
 cvtsd2si       %xmm1, %rax
@@ -474,3 +479,4 @@ fdivrp %st(1), %st(0) // CHECK: encoding: [0xde,0xf9]
 fsubrp %ST(0), %ST(1) // CHECK: encoding: [0xde,0xe9]
 fsubrp %ST(1), %ST(0) // CHECK: encoding: [0xde,0xe9]
 
+