ret float %cond
}
+define float @nabsf(float %a) {
+; CHECK-LABEL: nabsf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmov w8, s0
+; CHECK-NEXT: orr w8, w8, #0x80000000
+; CHECK-NEXT: fmov s0, w8
+; CHECK-NEXT: ret
+ %conv = bitcast float %a to i32
+ %and = or i32 %conv, -2147483648
+ %conv1 = bitcast i32 %and to float
+ ret float %conv1
+}
+
+define double @nabsd(double %a) {
+; CHECK-LABEL: nabsd:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmov x8, d0
+; CHECK-NEXT: orr x8, x8, #0x8000000000000000
+; CHECK-NEXT: fmov d0, x8
+; CHECK-NEXT: ret
+ %conv = bitcast double %a to i64
+ %and = or i64 %conv, -9223372036854775808
+ %conv1 = bitcast i64 %and to double
+ ret double %conv1
+}
+
+define <4 x float> @nabsv4f32(<4 x float> %a) {
+; CHECK-LABEL: nabsv4f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: orr v0.4s, #128, lsl #24
+; CHECK-NEXT: ret
+ %conv = bitcast <4 x float> %a to <4 x i32>
+ %and = or <4 x i32> %conv, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
+ %conv1 = bitcast <4 x i32> %and to <4 x float>
+ ret <4 x float> %conv1
+}
+
+define <2 x double> @nabsv2d64(<2 x double> %a) {
+; CHECK-LABEL: nabsv2d64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: orr x8, xzr, #0x8000000000000000
+; CHECK-NEXT: dup v1.2d, x8
+; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-NEXT: ret
+ %conv = bitcast <2 x double> %a to <2 x i64>
+ %and = or <2 x i64> %conv, <i64 -9223372036854775808, i64 -9223372036854775808>
+ %conv1 = bitcast <2 x i64> %and to <2 x double>
+ ret <2 x double> %conv1
+}
+
attributes #0 = { "no-nans-fp-math"="true" }
ret float %fsub
}
+define float @nabsf(float %a) {
+; CHECK-LABEL: nabsf:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; CHECK-NEXT: orps %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %conv = bitcast float %a to i32
+ %and = or i32 %conv, -2147483648
+ %conv1 = bitcast i32 %and to float
+ ret float %conv1
+}
+
+define double @nabsd(double %a) {
+; CHECK-LABEL: nabsd:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; CHECK-NEXT: orps %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %conv = bitcast double %a to i64
+ %and = or i64 %conv, -9223372036854775808
+ %conv1 = bitcast i64 %and to double
+ ret double %conv1
+}
+
+define <4 x float> @nabsv4f32(<4 x float> %a) {
+; CHECK-LABEL: nabsv4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: orps {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
+ %conv = bitcast <4 x float> %a to <4 x i32>
+ %and = or <4 x i32> %conv, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
+ %conv1 = bitcast <4 x i32> %and to <4 x float>
+ ret <4 x float> %conv1
+}
+
+define <2 x double> @nabsv2d64(<2 x double> %a) {
+; CHECK-LABEL: nabsv2d64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: orps {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
+ %conv = bitcast <2 x double> %a to <2 x i64>
+ %and = or <2 x i64> %conv, <i64 -9223372036854775808, i64 -9223372036854775808>
+ %conv1 = bitcast <2 x i64> %and to <2 x double>
+ ret <2 x double> %conv1
+}
+
define <4 x float> @fadd_bitcast_fneg_vec(<4 x float> %x, <4 x float> %y) {
; CHECK-LABEL: fadd_bitcast_fneg_vec:
; CHECK: # %bb.0: