+2006-12-25 Kazu Hirata <kazu@codesourcery.com>
+
+ * archures.c (bfd_mach_cpu32_fido): New.
+ (bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_a,
+ bfd_mach_mcf_isa_a_mac, bfd_mach_mcf_isa_a_emac,
+ bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
+ bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_b_nousp,
+ bfd_mach_mcf_isa_b_nousp_mac, bfd_mach_mcf_isa_b_nousp_emac,
+ bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac,
+ bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_float,
+ bfd_mach_mcf_isa_b_float_mac, bfd_mach_mcf_isa_b_float_emac):
+ Increment the defined values.
+ * bfd-in2.h: Regenerate.
+ * cpu-m68k.c (arch_info_struct): Add en entry for
+ bfd_mach_cpu32_fido.
+ * elf32-m68k.c (elf32_m68k_object_p): Handle
+ EF_M68K_CPU32_FIDO_A.
+ (elf32_m68k_merge_private_bfd_data): Use EF_M68K_CPU32_MASK.
+ (elf32_m68k_print_private_bfd_data): Handle
+ EF_M68K_CPU32_FIDO_A.
+
2006-12-25 Mei Ligang <ligang@sunnorth.com.cn>
- * elf32-score.c (score_elf_got_lo16_reloc): Change some variables type from
- unsigned to signed.
- (score_elf_final_link_relocate): Fix bugs of handling relocation type R_SCORE_GOT15,
- R_SCORE_GOT_LO16, and R_SCORE_REL32.
- (_bfd_score_elf_relocate_section): Handle R_SCORE_GOT_LO16 specially.
+ * elf32-score.c (score_elf_got_lo16_reloc): Change some variables
+ type from unsigned to signed.
+ (score_elf_final_link_relocate): Fix bugs of handling relocation
+ type R_SCORE_GOT15, R_SCORE_GOT_LO16, and R_SCORE_REL32.
+ (_bfd_score_elf_relocate_section): Handle R_SCORE_GOT_LO16
+ specially.
2006-12-23 Jakub Jelinek <jakub@redhat.com>
.#define bfd_mach_m68040 6
.#define bfd_mach_m68060 7
.#define bfd_mach_cpu32 8
-.#define bfd_mach_mcf_isa_a_nodiv 9
-.#define bfd_mach_mcf_isa_a 10
-.#define bfd_mach_mcf_isa_a_mac 11
-.#define bfd_mach_mcf_isa_a_emac 12
-.#define bfd_mach_mcf_isa_aplus 13
-.#define bfd_mach_mcf_isa_aplus_mac 14
-.#define bfd_mach_mcf_isa_aplus_emac 15
-.#define bfd_mach_mcf_isa_b_nousp 16
-.#define bfd_mach_mcf_isa_b_nousp_mac 17
-.#define bfd_mach_mcf_isa_b_nousp_emac 18
-.#define bfd_mach_mcf_isa_b 19
-.#define bfd_mach_mcf_isa_b_mac 20
-.#define bfd_mach_mcf_isa_b_emac 21
-.#define bfd_mach_mcf_isa_b_float 22
-.#define bfd_mach_mcf_isa_b_float_mac 23
-.#define bfd_mach_mcf_isa_b_float_emac 24
+.#define bfd_mach_cpu32_fido 9
+.#define bfd_mach_mcf_isa_a_nodiv 10
+.#define bfd_mach_mcf_isa_a 11
+.#define bfd_mach_mcf_isa_a_mac 12
+.#define bfd_mach_mcf_isa_a_emac 13
+.#define bfd_mach_mcf_isa_aplus 14
+.#define bfd_mach_mcf_isa_aplus_mac 15
+.#define bfd_mach_mcf_isa_aplus_emac 16
+.#define bfd_mach_mcf_isa_b_nousp 17
+.#define bfd_mach_mcf_isa_b_nousp_mac 18
+.#define bfd_mach_mcf_isa_b_nousp_emac 19
+.#define bfd_mach_mcf_isa_b 20
+.#define bfd_mach_mcf_isa_b_mac 21
+.#define bfd_mach_mcf_isa_b_emac 22
+.#define bfd_mach_mcf_isa_b_float 23
+.#define bfd_mach_mcf_isa_b_float_mac 24
+.#define bfd_mach_mcf_isa_b_float_emac 25
. bfd_arch_vax, {* DEC Vax *}
. bfd_arch_i960, {* Intel 960 *}
. {* The order of the following is important.
#define bfd_mach_m68040 6
#define bfd_mach_m68060 7
#define bfd_mach_cpu32 8
-#define bfd_mach_mcf_isa_a_nodiv 9
-#define bfd_mach_mcf_isa_a 10
-#define bfd_mach_mcf_isa_a_mac 11
-#define bfd_mach_mcf_isa_a_emac 12
-#define bfd_mach_mcf_isa_aplus 13
-#define bfd_mach_mcf_isa_aplus_mac 14
-#define bfd_mach_mcf_isa_aplus_emac 15
-#define bfd_mach_mcf_isa_b_nousp 16
-#define bfd_mach_mcf_isa_b_nousp_mac 17
-#define bfd_mach_mcf_isa_b_nousp_emac 18
-#define bfd_mach_mcf_isa_b 19
-#define bfd_mach_mcf_isa_b_mac 20
-#define bfd_mach_mcf_isa_b_emac 21
-#define bfd_mach_mcf_isa_b_float 22
-#define bfd_mach_mcf_isa_b_float_mac 23
-#define bfd_mach_mcf_isa_b_float_emac 24
+#define bfd_mach_cpu32_fido 9
+#define bfd_mach_mcf_isa_a_nodiv 10
+#define bfd_mach_mcf_isa_a 11
+#define bfd_mach_mcf_isa_a_mac 12
+#define bfd_mach_mcf_isa_a_emac 13
+#define bfd_mach_mcf_isa_aplus 14
+#define bfd_mach_mcf_isa_aplus_mac 15
+#define bfd_mach_mcf_isa_aplus_emac 16
+#define bfd_mach_mcf_isa_b_nousp 17
+#define bfd_mach_mcf_isa_b_nousp_mac 18
+#define bfd_mach_mcf_isa_b_nousp_emac 19
+#define bfd_mach_mcf_isa_b 20
+#define bfd_mach_mcf_isa_b_mac 21
+#define bfd_mach_mcf_isa_b_emac 22
+#define bfd_mach_mcf_isa_b_float 23
+#define bfd_mach_mcf_isa_b_float_mac 24
+#define bfd_mach_mcf_isa_b_float_emac 25
bfd_arch_vax, /* DEC Vax */
bfd_arch_i960, /* Intel 960 */
/* The order of the following is important.
N(bfd_mach_m68040, "m68k:68040", FALSE, &arch_info_struct[6]),
N(bfd_mach_m68060, "m68k:68060", FALSE, &arch_info_struct[7]),
N(bfd_mach_cpu32, "m68k:cpu32", FALSE, &arch_info_struct[8]),
+ N(bfd_mach_cpu32_fido, "m68k:fido", FALSE, &arch_info_struct[9]),
/* Various combinations of CF architecture features */
N(bfd_mach_mcf_isa_a_nodiv, "m68k:isa-a:nodiv",
- FALSE, &arch_info_struct[9]),
- N(bfd_mach_mcf_isa_a, "m68k:isa-a",
FALSE, &arch_info_struct[10]),
- N(bfd_mach_mcf_isa_a_mac, "m68k:isa-a:mac",
+ N(bfd_mach_mcf_isa_a, "m68k:isa-a",
FALSE, &arch_info_struct[11]),
- N(bfd_mach_mcf_isa_a_emac, "m68k:isa-a:emac",
+ N(bfd_mach_mcf_isa_a_mac, "m68k:isa-a:mac",
FALSE, &arch_info_struct[12]),
- N(bfd_mach_mcf_isa_aplus, "m68k:isa-aplus",
+ N(bfd_mach_mcf_isa_a_emac, "m68k:isa-a:emac",
FALSE, &arch_info_struct[13]),
- N(bfd_mach_mcf_isa_aplus_mac, "m68k:isa-aplus:mac",
+ N(bfd_mach_mcf_isa_aplus, "m68k:isa-aplus",
FALSE, &arch_info_struct[14]),
- N(bfd_mach_mcf_isa_aplus_emac, "m68k:isa-aplus:emac",
+ N(bfd_mach_mcf_isa_aplus_mac, "m68k:isa-aplus:mac",
FALSE, &arch_info_struct[15]),
- N(bfd_mach_mcf_isa_b_nousp, "m68k:isa-b:nousp",
+ N(bfd_mach_mcf_isa_aplus_emac, "m68k:isa-aplus:emac",
FALSE, &arch_info_struct[16]),
- N(bfd_mach_mcf_isa_b_nousp_mac, "m68k:isa-b:nousp:mac",
+ N(bfd_mach_mcf_isa_b_nousp, "m68k:isa-b:nousp",
FALSE, &arch_info_struct[17]),
- N(bfd_mach_mcf_isa_b_nousp_emac, "m68k:isa-b:nousp:emac",
+ N(bfd_mach_mcf_isa_b_nousp_mac, "m68k:isa-b:nousp:mac",
FALSE, &arch_info_struct[18]),
- N(bfd_mach_mcf_isa_b, "m68k:isa-b",
+ N(bfd_mach_mcf_isa_b_nousp_emac, "m68k:isa-b:nousp:emac",
FALSE, &arch_info_struct[19]),
- N(bfd_mach_mcf_isa_b_mac, "m68k:isa-b:mac",
+ N(bfd_mach_mcf_isa_b, "m68k:isa-b",
FALSE, &arch_info_struct[20]),
- N(bfd_mach_mcf_isa_b_emac, "m68k:isa-b:emac",
+ N(bfd_mach_mcf_isa_b_mac, "m68k:isa-b:mac",
FALSE, &arch_info_struct[21]),
- N(bfd_mach_mcf_isa_b_float, "m68k:isa-b:float",
+ N(bfd_mach_mcf_isa_b_emac, "m68k:isa-b:emac",
FALSE, &arch_info_struct[22]),
- N(bfd_mach_mcf_isa_b_float_mac, "m68k:isa-b:float:mac",
+ N(bfd_mach_mcf_isa_b_float, "m68k:isa-b:float",
FALSE, &arch_info_struct[23]),
- N(bfd_mach_mcf_isa_b_float_emac, "m68k:isa-b:float:emac",
+ N(bfd_mach_mcf_isa_b_float_mac, "m68k:isa-b:float:mac",
FALSE, &arch_info_struct[24]),
+ N(bfd_mach_mcf_isa_b_float_emac, "m68k:isa-b:float:emac",
+ FALSE, &arch_info_struct[25]),
/* Legacy names for CF architectures */
- N(bfd_mach_mcf_isa_a_nodiv, "m68k:5200", FALSE, &arch_info_struct[25]),
- N(bfd_mach_mcf_isa_a_mac,"m68k:5206e", FALSE, &arch_info_struct[26]),
- N(bfd_mach_mcf_isa_a_mac, "m68k:5307", FALSE, &arch_info_struct[27]),
- N(bfd_mach_mcf_isa_b_nousp_mac, "m68k:5407", FALSE, &arch_info_struct[28]),
- N(bfd_mach_mcf_isa_aplus_emac, "m68k:528x", FALSE, &arch_info_struct[29]),
- N(bfd_mach_mcf_isa_aplus_emac, "m68k:521x", FALSE, &arch_info_struct[30]),
- N(bfd_mach_mcf_isa_a_emac, "m68k:5249", FALSE, &arch_info_struct[31]),
+ N(bfd_mach_mcf_isa_a_nodiv, "m68k:5200", FALSE, &arch_info_struct[26]),
+ N(bfd_mach_mcf_isa_a_mac,"m68k:5206e", FALSE, &arch_info_struct[27]),
+ N(bfd_mach_mcf_isa_a_mac, "m68k:5307", FALSE, &arch_info_struct[28]),
+ N(bfd_mach_mcf_isa_b_nousp_mac, "m68k:5407", FALSE, &arch_info_struct[29]),
+ N(bfd_mach_mcf_isa_aplus_emac, "m68k:528x", FALSE, &arch_info_struct[30]),
+ N(bfd_mach_mcf_isa_aplus_emac, "m68k:521x", FALSE, &arch_info_struct[31]),
+ N(bfd_mach_mcf_isa_a_emac, "m68k:5249", FALSE, &arch_info_struct[32]),
N(bfd_mach_mcf_isa_b_float_emac, "m68k:547x",
- FALSE, &arch_info_struct[32]),
- N(bfd_mach_mcf_isa_b_float_emac, "m68k:548x",
FALSE, &arch_info_struct[33]),
+ N(bfd_mach_mcf_isa_b_float_emac, "m68k:548x",
+ FALSE, &arch_info_struct[34]),
N(bfd_mach_mcf_isa_b_float_emac, "m68k:cfv4e", FALSE, 0),
};
m68040|m68881|m68851,
m68060|m68881|m68851,
cpu32|m68881,
+ cpu32|m68881|fido_a,
mcfisa_a,
mcfisa_a|mcfhwdiv,
mcfisa_a|mcfhwdiv|mcfmac,
if (a->mach <= bfd_mach_m68060 && b->mach <= bfd_mach_m68060)
/* Merge m68k machine. */
return a->mach > b->mach ? a : b;
- else if (a->mach == bfd_mach_cpu32 && b->mach == bfd_mach_cpu32)
- /* CPU32 is compatible with itself. */
- return a;
- else if (a->mach >= bfd_mach_mcf_isa_a_nodiv
- && b->mach >= bfd_mach_mcf_isa_a_nodiv)
+ else if (a->mach >= bfd_mach_cpu32 && b->mach >= bfd_mach_cpu32)
{
- /* Merge cf machine. */
+ /* Merge the machine features. */
unsigned features = (bfd_m68k_mach_to_features (a->mach)
| bfd_m68k_mach_to_features (b->mach));
+ /* CPU32 and Coldfire are incompatible. */
+ if ((~features & (cpu32 | mcfisa_a)) == 0)
+ return NULL;
+
/* ISA A+ and ISA B are incompatible. */
if ((~features & (mcfisa_aa | mcfisa_b)) == 0)
return NULL;