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target-xtensa: handle cache options in the overlay tool
authorMax Filippov <jcmvbkbc@gmail.com>
Mon, 24 Oct 2011 00:22:47 +0000 (04:22 +0400)
committerMax Filippov <jcmvbkbc@gmail.com>
Wed, 2 Nov 2011 01:05:52 +0000 (05:05 +0400)
Cache options must be enabled for the cores that have cache to avoid
illegal instruction exceptions.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target-xtensa/overlay_tool.h

index 060e8e5..9cef27d 100644 (file)
         XTENSA_OPTION_HIGH_PRIORITY_INTERRUPT) | \
     XCHAL_OPTION(XCHAL_HAVE_CCOUNT, XTENSA_OPTION_TIMER_INTERRUPT) | \
     /* Local memory, TODO */ \
+    XCHAL_OPTION(XCHAL_ICACHE_WAYS, XTENSA_OPTION_ICACHE) | \
+    XCHAL_OPTION(XCHAL_ICACHE_LINE_LOCKABLE, \
+            XTENSA_OPTION_ICACHE_INDEX_LOCK) | \
+    XCHAL_OPTION(XCHAL_DCACHE_WAYS, XTENSA_OPTION_DCACHE) | \
+    XCHAL_OPTION(XCHAL_DCACHE_LINE_LOCKABLE, \
+            XTENSA_OPTION_DCACHE_INDEX_LOCK) | \
     XCHAL_OPTION(XCHAL_UNALIGNED_LOAD_HW, XTENSA_OPTION_HW_ALIGNMENT) | \
     /* Memory protection and translation */ \
     XCHAL_OPTION(XCHAL_HAVE_MIMIC_CACHEATTR, \