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iio: adc: exynos-adc: Use proper number of channels for Exynos4x12
authorKrzysztof Kozlowski <krzk@kernel.org>
Tue, 12 Feb 2019 17:45:49 +0000 (18:45 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 16 Sep 2019 06:22:06 +0000 (08:22 +0200)
[ Upstream commit 103cda6a3b8d2c10d5f8cd7abad118e9db8f4776 ]

Exynos4212 and Exynos4412 have only four ADC channels so using
"samsung,exynos-adc-v1" compatible (for eight channels ADCv1) on them is
wrong.  Add a new compatible for Exynos4x12.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.txt
drivers/iio/adc/exynos_adc.c

index a10c1f8..e1fe02f 100644 (file)
@@ -11,11 +11,13 @@ New driver handles the following
 
 Required properties:
 - compatible:          Must be "samsung,exynos-adc-v1"
-                               for exynos4412/5250 controllers.
+                               for Exynos5250 controllers.
                        Must be "samsung,exynos-adc-v2" for
                                future controllers.
                        Must be "samsung,exynos3250-adc" for
                                controllers compatible with ADC of Exynos3250.
+                       Must be "samsung,exynos4212-adc" for
+                               controllers compatible with ADC of Exynos4212 and Exynos4412.
                        Must be "samsung,exynos7-adc" for
                                the ADC in Exynos7 and compatibles
                        Must be "samsung,s3c2410-adc" for
index 41da522..1ca2c4d 100644 (file)
 #define MAX_ADC_V2_CHANNELS            10
 #define MAX_ADC_V1_CHANNELS            8
 #define MAX_EXYNOS3250_ADC_CHANNELS    2
+#define MAX_EXYNOS4212_ADC_CHANNELS    4
 #define MAX_S5PV210_ADC_CHANNELS       10
 
 /* Bit definitions common for ADC_V1 and ADC_V2 */
@@ -271,6 +272,19 @@ static void exynos_adc_v1_start_conv(struct exynos_adc *info,
        writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
 }
 
+/* Exynos4212 and 4412 is like ADCv1 but with four channels only */
+static const struct exynos_adc_data exynos4212_adc_data = {
+       .num_channels   = MAX_EXYNOS4212_ADC_CHANNELS,
+       .mask           = ADC_DATX_MASK,        /* 12 bit ADC resolution */
+       .needs_adc_phy  = true,
+       .phy_offset     = EXYNOS_ADCV1_PHY_OFFSET,
+
+       .init_hw        = exynos_adc_v1_init_hw,
+       .exit_hw        = exynos_adc_v1_exit_hw,
+       .clear_irq      = exynos_adc_v1_clear_irq,
+       .start_conv     = exynos_adc_v1_start_conv,
+};
+
 static const struct exynos_adc_data exynos_adc_v1_data = {
        .num_channels   = MAX_ADC_V1_CHANNELS,
        .mask           = ADC_DATX_MASK,        /* 12 bit ADC resolution */
@@ -493,6 +507,9 @@ static const struct of_device_id exynos_adc_match[] = {
                .compatible = "samsung,s5pv210-adc",
                .data = &exynos_adc_s5pv210_data,
        }, {
+               .compatible = "samsung,exynos4212-adc",
+               .data = &exynos4212_adc_data,
+       }, {
                .compatible = "samsung,exynos-adc-v1",
                .data = &exynos_adc_v1_data,
        }, {