ARM: dts: msm: Enable CX Ipeak Mitigation for MSMFALCON

This enables the assertion of CX ipeak mitigation during
MSS restart.

Change-Id: I113037aabafeacba7079d530ca859833f475f649
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>

diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi
index ed8bee0..365b534 100644 (file)
--- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi
+++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi
@@ -1099,9 +1099,11 @@
                      <0x1f65000 0x008>,
                      <0x1f64000 0x008>,
                      <0x4180000 0x040>,
-                     <0x00179000 0x004>;
+                     <0x00179000 0x004>,
+                     <0x01fe5048 0x004>;
                reg-names = "qdsp6_base", "halt_q6", "halt_modem",
-                           "halt_nc", "rmb_base", "restart_reg";
+                           "halt_nc", "rmb_base", "restart_reg",
+                           "cxip_lm_vote_clear";
 
                clocks = <&clock_rpmcc RPM_XO_CLK_SRC>,
                         <&clock_gcc GCC_MSS_CFG_AHB_CLK>,
@@ -1132,6 +1134,7 @@
                qcom,qdsp6v62-1-5;
                memory-region = <&modem_fw_mem>;
                qcom,mem-protect-id = <0xF>;
+               qcom,cx-ipeak-vote;
 
                /* GPIO inputs from mss */
                qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;