ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board

Add sdmmc1_clk_pins_a in sdmmc1 pinctrl nodes, to properly manage
clock slew-rate.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts
index 7e96d9e..aae8d35 100644 (file)
--- a/arch/arm/boot/dts/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/stm32mp135f-dk.dts
@@ -39,8 +39,8 @@
 
 &sdmmc1 {
        pinctrl-names = "default", "opendrain";
-       pinctrl-0 = <&sdmmc1_b4_pins_a>;
-       pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
+       pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
+       pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
        broken-cd;
        disable-wp;
        st,neg-edge;