nv50/ir: add wrap mode for shift operations

D3D1x specifies that only the low 5 bit of the shift are used.

diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir.h b/src/gallium/drivers/nv50/codegen/nv50_ir.h
index e92b152..8830608 100644 (file)
--- a/src/gallium/drivers/nv50/codegen/nv50_ir.h
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir.h
@@ -136,6 +136,7 @@ enum operation
 #define NV50_IR_SUBOP_LDC_IL       1
 #define NV50_IR_SUBOP_LDC_IS       2
 #define NV50_IR_SUBOP_LDC_ISL      3
+#define NV50_IR_SUBOP_SHIFT_WRAP   1
 
 enum DataType
 {

diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_print.cpp
index a730d2c..4040a4d 100644 (file)
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_print.cpp
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_print.cpp
@@ -437,6 +437,8 @@ void Instruction::print() const
          PRINT(" %sBB:%i", colour[TXT_BRA], asFlow()->target.bb->getId());
    } else {
       PRINT("%s ", operationStr[op]);
+      if (subOp)
+         PRINT("(SUBOP:%u) ", subOp);
       if (perPatch)
          PRINT("patch ");
       if (asTex())

diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp
index 6bcbd62..13f5d2f 100644 (file)
--- a/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp
@@ -665,8 +665,8 @@ CodeEmitterNVC0::emitShift(const Instruction *i)
       emitForm_A(i, HEX64(60000000, 00000003));
    }
 
-   if (0)
-      code[0] |= 1 << 9; // clamp shift amount
+   if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
+      code[0] |= 1 << 9;
 }
 
 void