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drm/amdgpu: add amdgpu_irq_gpu_reset_resume_helper
authorChunming Zhou <David1.Zhou@amd.com>
Thu, 16 Jun 2016 08:54:53 +0000 (16:54 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 7 Jul 2016 18:54:48 +0000 (14:54 -0400)
irq need to update when gpu reset happens.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h

index b9ddb4f..307998c 100644 (file)
@@ -1973,6 +1973,7 @@ retry:
                /* bad news, how to tell it to userspace ? */
                dev_info(adev->dev, "GPU reset failed\n");
        }
+       amdgpu_irq_gpu_reset_resume_helper(adev);
 
        return r;
 }
index 835a3fa..278708f 100644 (file)
@@ -383,6 +383,18 @@ int amdgpu_irq_update(struct amdgpu_device *adev,
        return r;
 }
 
+void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
+{
+       int i, j;
+       for (i = 0; i < AMDGPU_MAX_IRQ_SRC_ID; i++) {
+               struct amdgpu_irq_src *src = adev->irq.sources[i];
+               if (!src)
+                       continue;
+               for (j = 0; j < src->num_types; j++)
+                       amdgpu_irq_update(adev, src, j);
+       }
+}
+
 /**
  * amdgpu_irq_get - enable interrupt
  *
index e124b59..7ef0935 100644 (file)
@@ -94,6 +94,7 @@ int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
                   unsigned type);
 bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
                        unsigned type);
+void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev);
 
 int amdgpu_irq_add_domain(struct amdgpu_device *adev);
 void amdgpu_irq_remove_domain(struct amdgpu_device *adev);