frame_offset = 0;
if (omap_lcd->plm != 2) {
- cpu_physical_memory_read(omap_lcd->dma->phys_framebuffer[
- omap_lcd->dma->current_frame],
- (void *)omap_lcd->palette, 0x200);
+ cpu_physical_memory_read(
+ omap_lcd->dma->phys_framebuffer[omap_lcd->dma->current_frame],
+ omap_lcd->palette, 0x200);
switch (omap_lcd->palette[0] >> 12 & 7) {
case 3 ... 7:
frame_offset += 0x200;
if (s->plm != 2 && !s->palette_done) {
cpu_physical_memory_read(
- s->dma->phys_framebuffer[s->dma->current_frame],
- (void *)s->palette, 0x200);
+ s->dma->phys_framebuffer[s->dma->current_frame],
+ s->palette, 0x200);
s->palette_done = 1;
omap_lcd_interrupts(s);
}
hwaddr addr = channel_reg(ctrl, c, RW_GROUP);
/* Load and decode. FIXME: handle endianness. */
- cpu_physical_memory_read (addr,
- (void *) &ctrl->channels[c].current_g,
- sizeof ctrl->channels[c].current_g);
+ cpu_physical_memory_read(addr, &ctrl->channels[c].current_g,
+ sizeof(ctrl->channels[c].current_g));
}
static void dump_c(int ch, struct dma_descr_context *c)
hwaddr addr = channel_reg(ctrl, c, RW_GROUP_DOWN);
/* Load and decode. FIXME: handle endianness. */
- cpu_physical_memory_read (addr,
- (void *) &ctrl->channels[c].current_c,
- sizeof ctrl->channels[c].current_c);
+ cpu_physical_memory_read(addr, &ctrl->channels[c].current_c,
+ sizeof(ctrl->channels[c].current_c));
D(dump_c(c, &ctrl->channels[c].current_c));
/* I guess this should update the current pos. */
/* Load and decode. FIXME: handle endianness. */
D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));
- cpu_physical_memory_read (addr,
- (void *) &ctrl->channels[c].current_d,
- sizeof ctrl->channels[c].current_d);
+ cpu_physical_memory_read(addr, &ctrl->channels[c].current_d,
+ sizeof(ctrl->channels[c].current_d));
D(dump_d(c, &ctrl->channels[c].current_d));
ctrl->channels[c].regs[RW_DATA] = addr;
/* Encode and store. FIXME: handle endianness. */
D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));
D(dump_d(c, &ctrl->channels[c].current_d));
- cpu_physical_memory_write (addr,
- (void *) &ctrl->channels[c].current_c,
- sizeof ctrl->channels[c].current_c);
+ cpu_physical_memory_write(addr, &ctrl->channels[c].current_c,
+ sizeof(ctrl->channels[c].current_c));
}
static void channel_store_d(struct fs_dma_ctrl *ctrl, int c)
/* Encode and store. FIXME: handle endianness. */
D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));
- cpu_physical_memory_write (addr,
- (void *) &ctrl->channels[c].current_d,
- sizeof ctrl->channels[c].current_d);
+ cpu_physical_memory_write(addr, &ctrl->channels[c].current_d,
+ sizeof(ctrl->channels[c].current_d));
}
static inline void channel_stop(struct fs_dma_ctrl *ctrl, int c)
cmp_descr_pa = pvscsi_ring_pop_cmp_descr(&s->rings);
trace_pvscsi_cmp_ring_put(cmp_descr_pa);
- cpu_physical_memory_write(cmp_descr_pa, (void *)cmp_desc,
- sizeof(*cmp_desc));
+ cpu_physical_memory_write(cmp_descr_pa, cmp_desc, sizeof(*cmp_desc));
}
static void
msg_descr_pa = pvscsi_ring_pop_msg_descr(&s->rings);
trace_pvscsi_msg_ring_put(msg_descr_pa);
- cpu_physical_memory_write(msg_descr_pa, (void *)msg_desc,
- sizeof(*msg_desc));
+ cpu_physical_memory_write(msg_descr_pa, msg_desc, sizeof(*msg_desc));
}
static void
{
struct PVSCSISGElement elem;
- cpu_physical_memory_read(sg->elemAddr, (void *)&elem, sizeof(elem));
+ cpu_physical_memory_read(sg->elemAddr, &elem, sizeof(elem));
if ((elem.flags & ~PVSCSI_KNOWN_FLAGS) != 0) {
/*
* There is PVSCSI_SGE_FLAG_CHAIN_ELEMENT flag described in
+ address_space_write_rom(E1, E2, E3, E4, E5)
|
+- cpu_physical_memory_rw(E1, (T *)(E2), E3, E4)
++ cpu_physical_memory_rw(E1, E2, E3, E4)
+|
+- cpu_physical_memory_read(E1, (T *)(E2), E3)
++ cpu_physical_memory_read(E1, E2, E3)
+|
+- cpu_physical_memory_write(E1, (T *)(E2), E3)
++ cpu_physical_memory_write(E1, E2, E3)
+|
+
- dma_memory_read(E1, E2, (T *)(E3), E4)
+ dma_memory_read(E1, E2, E3, E4)
|
static int hax_handle_fastmmio(CPUArchState *env, struct hax_fastmmio *hft)
{
if (hft->direction < 2) {
- cpu_physical_memory_rw(hft->gpa, (uint8_t *) &hft->value, hft->size,
+ cpu_physical_memory_rw(hft->gpa, &hft->value, hft->size,
hft->direction);
} else {
/*
* hft->direction == 2: gpa ==> gpa2
*/
uint64_t value;
- cpu_physical_memory_rw(hft->gpa, (uint8_t *) &value, hft->size, 0);
- cpu_physical_memory_rw(hft->gpa2, (uint8_t *) &value, hft->size, 1);
+ cpu_physical_memory_rw(hft->gpa, &value, hft->size, 0);
+ cpu_physical_memory_rw(hft->gpa2, &value, hft->size, 1);
}
return 0;