/*
- Produced by NSL Core(version=20110614), IP ARCH, Inc. Wed Aug 10 21:05:17 2011
+ Produced by NSL Core(version=20110614), IP ARCH, Inc. Fri Aug 19 21:02:54 2011
Licensed to :LIMITED EVALUATION USER:
*/
/*
sc_in<bool> p_reset, m_clock;
sc_in <sc_uint<8> > send_data;
sc_out <sc_uint<8> > resv_data;
-sc_in<bool> send;
-sc_in<bool> read_MOSI;
-sc_in<bool> write_MOSO;
+sc_out <sc_uint<1> > MOSI;
+sc_in <sc_uint<1> > MISO;
+sc_out <sc_uint<1> > SS;
+sc_out <sc_uint<1> > SCLK;
+sc_in<sc_uint<1> > send;
+sc_in<sc_uint<1> > read_MISO;
+sc_in<sc_uint<1> > write_MOSI;
sc_signal<sc_uint<8> > output_data;
sc_signal<sc_uint<8> > input_data;
sc_signal<sc_uint<1> > work_flg;
+ sc_signal<sc_uint<1> > SS_reg;
+ sc_signal<sc_uint<1> > SCLK_reg;
+ sc_signal<sc_uint<1> > MOSI_reg;
+ sc_signal<sc_uint<1> > MISO_reg;
+ sc_signal<sc_uint<1> > _reg_0;
+ sc_signal<sc_uint<1> > _reg_1;
+ sc_signal<sc_uint<1> > _reg_2;
+ sc_signal<sc_uint<1> > _reg_3;
+ sc_signal<sc_uint<1> > _reg_4;
+ sc_signal<sc_uint<1> > _reg_5;
+ sc_signal<sc_uint<1> > _reg_6;
+ sc_signal<sc_uint<1> > _reg_7;
+ sc_signal<sc_uint<1> > _reg_8;
+ sc_signal<sc_uint<1> > _reg_9;
+ sc_signal<sc_uint<1> > _reg_10;
+ sc_signal<sc_uint<1> > _reg_11;
+ sc_signal<sc_uint<1> > _reg_12;
+ sc_signal<sc_uint<1> > _reg_13;
+ sc_signal<sc_uint<1> > _reg_14;
+ sc_signal<sc_uint<1> > _reg_15;
+ sc_signal<sc_uint<1> > _reg_16;
+ sc_signal<sc_uint<1> > _net_17;
+ void _sc_method__net_17() {
+ if (write_MOSI.read())
+ _net_17 = (sc_uint<1>)(work_flg.read()==(sc_uint<1>)0ul);
+ else
+ _net_17 = 0;
+}
+ void _sc_method_resv_data() {
+ if (read_MISO.read())
+ resv_data = input_data.read();
+ else
+ resv_data = 0;
+}
void _sc_method_output_data() {
-
+ if ((sc_uint<1>)(write_MOSI.read()&_net_17.read()))
+ output_data = send_data.read();
}
void _sc_method_input_data() {
}
void _sc_method_work_flg() {
+ if (p_reset)
+ work_flg = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|_reg_16.read()))
+ work_flg = (sc_uint<1>)1ul;
+}
+void _sc_method_SS_reg() {
+ if (p_reset)
+ SS_reg = (sc_uint<1>)1ul;
+ else
+ if ((sc_uint<1>)(send.read()|_reg_16.read()))
+ SS_reg = (sc_uint<1>)0ul;
+}
+void _sc_method_SCLK_reg() {
+ if (p_reset)
+ SCLK_reg = (sc_uint<1>)0ul;
+ else
+ if (_reg_15.read())
+ SCLK_reg = (sc_uint<1>)1ul;
+ else if (_reg_14.read())
+ SCLK_reg = (sc_uint<1>)0ul;
+ else if (_reg_13.read())
+ SCLK_reg = (sc_uint<1>)1ul;
+ else if (_reg_12.read())
+ SCLK_reg = (sc_uint<1>)0ul;
+ else if (_reg_11.read())
+ SCLK_reg = (sc_uint<1>)1ul;
+ else if (_reg_10.read())
+ SCLK_reg = (sc_uint<1>)0ul;
+ else if (_reg_9.read())
+ SCLK_reg = (sc_uint<1>)1ul;
+ else if (_reg_8.read())
+ SCLK_reg = (sc_uint<1>)0ul;
+ else if (_reg_7.read())
+ SCLK_reg = (sc_uint<1>)1ul;
+ else if (_reg_6.read())
+ SCLK_reg = (sc_uint<1>)0ul;
+ else if (_reg_5.read())
+ SCLK_reg = (sc_uint<1>)1ul;
+ else if (_reg_4.read())
+ SCLK_reg = (sc_uint<1>)0ul;
+ else if (_reg_3.read())
+ SCLK_reg = (sc_uint<1>)1ul;
+ else if (_reg_2.read())
+ SCLK_reg = (sc_uint<1>)0ul;
+ else if (_reg_1.read())
+ SCLK_reg = (sc_uint<1>)1ul;
+ else if (_reg_0.read())
+ SCLK_reg = (sc_uint<1>)0ul;
+}
+void _sc_method_MOSI_reg() {
+ if ((sc_uint<1>)(send.read()|_reg_16.read()))
+ MOSI_reg = (sc_uint<1>)(output_data.read()).range(7,7);
+ else if (_reg_14.read())
+ MOSI_reg = (sc_uint<1>)(output_data.read()).range(7,7);
+ else if (_reg_12.read())
+ MOSI_reg = (sc_uint<1>)(output_data.read()).range(6,6);
+ else if (_reg_10.read())
+ MOSI_reg = (sc_uint<1>)(output_data.read()).range(5,5);
+ else if (_reg_8.read())
+ MOSI_reg = (sc_uint<1>)(output_data.read()).range(4,4);
+ else if (_reg_6.read())
+ MOSI_reg = (sc_uint<1>)(output_data.read()).range(3,3);
+ else if (_reg_4.read())
+ MOSI_reg = (sc_uint<1>)(output_data.read()).range(2,2);
+ else if (_reg_2.read())
+ MOSI_reg = (sc_uint<1>)(output_data.read()).range(1,1);
+ else if (_reg_0.read())
+ MOSI_reg = (sc_uint<1>)(output_data.read()).range(0,0);
+}
+void _sc_method_MISO_reg() {
}
+void _sc_method__reg_0() {
+ if (p_reset)
+ _reg_0 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_0.read()|_reg_1.read()))))
+ _reg_0 = _reg_1.read();
+}
+void _sc_method__reg_1() {
+ if (p_reset)
+ _reg_1 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_1.read()|_reg_2.read()))))
+ _reg_1 = _reg_2.read();
+}
+void _sc_method__reg_2() {
+ if (p_reset)
+ _reg_2 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_2.read()|_reg_3.read()))))
+ _reg_2 = _reg_3.read();
+}
+void _sc_method__reg_3() {
+ if (p_reset)
+ _reg_3 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_3.read()|_reg_4.read()))))
+ _reg_3 = _reg_4.read();
+}
+void _sc_method__reg_4() {
+ if (p_reset)
+ _reg_4 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_4.read()|_reg_5.read()))))
+ _reg_4 = _reg_5.read();
+}
+void _sc_method__reg_5() {
+ if (p_reset)
+ _reg_5 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_5.read()|_reg_6.read()))))
+ _reg_5 = _reg_6.read();
+}
+void _sc_method__reg_6() {
+ if (p_reset)
+ _reg_6 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_6.read()|_reg_7.read()))))
+ _reg_6 = _reg_7.read();
+}
+void _sc_method__reg_7() {
+ if (p_reset)
+ _reg_7 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_7.read()|_reg_8.read()))))
+ _reg_7 = _reg_8.read();
+}
+void _sc_method__reg_8() {
+ if (p_reset)
+ _reg_8 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_8.read()|_reg_9.read()))))
+ _reg_8 = _reg_9.read();
+}
+void _sc_method__reg_9() {
+ if (p_reset)
+ _reg_9 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_9.read()|_reg_10.read()))))
+ _reg_9 = _reg_10.read();
+}
+void _sc_method__reg_10() {
+ if (p_reset)
+ _reg_10 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_10.read()|_reg_11.read()))))
+ _reg_10 = _reg_11.read();
+}
+void _sc_method__reg_11() {
+ if (p_reset)
+ _reg_11 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_11.read()|_reg_12.read()))))
+ _reg_11 = _reg_12.read();
+}
+void _sc_method__reg_12() {
+ if (p_reset)
+ _reg_12 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_12.read()|_reg_13.read()))))
+ _reg_12 = _reg_13.read();
+}
+void _sc_method__reg_13() {
+ if (p_reset)
+ _reg_13 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_13.read()|_reg_14.read()))))
+ _reg_13 = _reg_14.read();
+}
+void _sc_method__reg_14() {
+ if (p_reset)
+ _reg_14 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_14.read()|_reg_15.read()))))
+ _reg_14 = _reg_15.read();
+}
+void _sc_method__reg_15() {
+ if (p_reset)
+ _reg_15 = (sc_uint<1>)0ul;
+ else
+ if ((sc_uint<1>)(send.read()|((sc_uint<1>)(_reg_15.read()|_reg_16.read()))))
+ _reg_15 = (sc_uint<1>)(_reg_16.read()|send.read());
+}
+void _sc_method__reg_16() {
+ if (p_reset)
+ _reg_16 = (sc_uint<1>)0ul;
+ else
+ if (_reg_16.read())
+ _reg_16 = (sc_uint<1>)0ul;
+}
SC_CTOR( spi_controler )
:
output_data("output_data"),
input_data("input_data"),
work_flg("work_flg"),
+ SS_reg("SS_reg"),
+ SCLK_reg("SCLK_reg"),
+ MOSI_reg("MOSI_reg"),
+ MISO_reg("MISO_reg"),
+ _reg_0("_reg_0"),
+ _reg_1("_reg_1"),
+ _reg_2("_reg_2"),
+ _reg_3("_reg_3"),
+ _reg_4("_reg_4"),
+ _reg_5("_reg_5"),
+ _reg_6("_reg_6"),
+ _reg_7("_reg_7"),
+ _reg_8("_reg_8"),
+ _reg_9("_reg_9"),
+ _reg_10("_reg_10"),
+ _reg_11("_reg_11"),
+ _reg_12("_reg_12"),
+ _reg_13("_reg_13"),
+ _reg_14("_reg_14"),
+ _reg_15("_reg_15"),
+ _reg_16("_reg_16"),
+ _net_17("_net_17"),
send_data("send_data"),
resv_data("resv_data"),
+ MOSI("MOSI"),
+ MISO("MISO"),
+ SS("SS"),
+ SCLK("SCLK"),
p_reset("p_reset"),
m_clock("m_clock")
{
+ SC_METHOD( _sc_method_output_data ) ;
+ sensitive << m_clock.pos();
+ SC_METHOD( _sc_method_work_flg ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method_SS_reg ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method_SCLK_reg ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method_MOSI_reg ) ;
+ sensitive << m_clock.pos();
+ SC_METHOD( _sc_method__reg_0 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_1 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_2 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_3 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_4 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_5 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_6 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_7 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_8 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_9 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_10 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_11 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_12 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_13 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_14 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_15 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__reg_16 ) ;
+ sensitive << m_clock.pos() << p_reset.pos()
+;
+ SC_METHOD( _sc_method__net_17 ) ;
+ sensitive << write_MOSI << work_flg ;
+ SC_METHOD( _sc_method_resv_data ) ;
+ sensitive << read_MISO << input_data ;
};
};
/*
- Produced by NSL Core(version=20110614), IP ARCH, Inc. Wed Aug 10 21:05:17 2011
+ Produced by NSL Core(version=20110614), IP ARCH, Inc. Fri Aug 19 21:02:54 2011
Licensed to :LIMITED EVALUATION USER:
*/
#include "SPI_controler_top.h"\r
SPIControlerTop::SPIControlerTop()\r
{\r
-sc_signal<bool> send;\r
-sc_signal<bool> read_MOSI;\r
-sc_signal<bool> write_MOSO;\r
int stop;\r
tf = sc_create_vcd_trace_file("spi_controler");\r
tf->set_time_unit(1, SC_NS);\r
sc_trace(tf,spi_controler.send_data,"spi_controler.send_data");\r
sc_trace(tf,spi_controler.resv_data,"spi_controler.resv_data");\r
+ sc_trace(tf,spi_controler.MOSI,"spi_controler.MOSI");\r
+ sc_trace(tf,spi_controler.MISO,"spi_controler.MISO");\r
+ sc_trace(tf,spi_controler.SS,"spi_controler.SS");\r
+ sc_trace(tf,spi_controler.SCLK,"spi_controler.SCLK");\r
sc_trace(tf,spi_controler.send,"spi_controler.send");\r
- sc_trace(tf,spi_controler.read_MOSI,"spi_controler.read_MOSI");\r
- sc_trace(tf,spi_controler.write_MOSO,"spi_controler.write_MOSO");\r
+ sc_trace(tf,spi_controler.read_MISO,"spi_controler.read_MISO");\r
+ sc_trace(tf,spi_controler.write_MOSI,"spi_controler.write_MOSI");\r
sc_trace(tf,spi_controler.p_reset,"spi_controler.p_reset");\r
sc_trace(tf,spi_controler.m_clock,"spi_controler.m_clock");\r
sc_trace(tf,spi_controler.output_data,"spi_controler.output_data");\r
sc_trace(tf,spi_controler.input_data,"spi_controler.input_data");\r
sc_trace(tf,spi_controler.work_flg,"spi_controler.work_flg");\r
+ sc_trace(tf,spi_controler.SS_reg,"spi_controler.SS_reg");\r
+ sc_trace(tf,spi_controler.SCLK_reg,"spi_controler.SCLK_reg");\r
+ sc_trace(tf,spi_controler.MOSI_reg,"spi_controler.MOSI_reg");\r
+ sc_trace(tf,spi_controler.MISO_reg,"spi_controler.MISO_reg");\r
+ sc_trace(tf,spi_controler._reg_0,"spi_controler._reg_0");\r
+ sc_trace(tf,spi_controler._reg_1,"spi_controler._reg_1");\r
+ sc_trace(tf,spi_controler._reg_2,"spi_controler._reg_2");\r
+ sc_trace(tf,spi_controler._reg_3,"spi_controler._reg_3");\r
+ sc_trace(tf,spi_controler._reg_4,"spi_controler._reg_4");\r
+ sc_trace(tf,spi_controler._reg_5,"spi_controler._reg_5");\r
+ sc_trace(tf,spi_controler._reg_6,"spi_controler._reg_6");\r
+ sc_trace(tf,spi_controler._reg_7,"spi_controler._reg_7");\r
+ sc_trace(tf,spi_controler._reg_8,"spi_controler._reg_8");\r
+ sc_trace(tf,spi_controler._reg_9,"spi_controler._reg_9");\r
+ sc_trace(tf,spi_controler._reg_10,"spi_controler._reg_10");\r
+ sc_trace(tf,spi_controler._reg_11,"spi_controler._reg_11");\r
+ sc_trace(tf,spi_controler._reg_12,"spi_controler._reg_12");\r
+ sc_trace(tf,spi_controler._reg_13,"spi_controler._reg_13");\r
+ sc_trace(tf,spi_controler._reg_14,"spi_controler._reg_14");\r
+ sc_trace(tf,spi_controler._reg_15,"spi_controler._reg_15");\r
+ sc_trace(tf,spi_controler._reg_16,"spi_controler._reg_16");\r
+ sc_trace(tf,spi_controler._net_17,"spi_controler._net_17");\r
c_clock cclk("cclk");\r
cclk.m_clock(m_clock);\r
spi_controler.p_reset(p_reset);\r
spi_controler.m_clock(m_clock);\r
spi_controler.send_data(send_data);\r
spi_controler.resv_data(resv_data);\r
- spi_controler.send(send);\r
- spi_controler.read_MOSI(read_MOSI);\r
- spi_controler.write_MOSO(write_MOSO);\r
+ spi_controler.MOSI(MOSI);\r
+ spi_controler.MISO(MISO);\r
+ spi_controler.SS(SS);\r
+ spi_controler.SCLK(SCLK);\r
+ spi_controler.send(send_w);\r
+ spi_controler.read_MISO(read_MISO_w);\r
+ spi_controler.write_MOSI(write_MOSI_w);\r
sc_start(10, SC_NS);\r
}\r
\r
{\r
}\r
\r
-char SPIControlerTop::read_MOSI()\r
+char SPIControlerTop::read_MISO()\r
{\r
return 0;\r
}\r
\r
-void SPIControlerTop::write_MOSO(char send_data)\r
+void SPIControlerTop::write_MOSI(char send_data)\r
{\r
}\r
\r